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IBM 1 Series - Receive Operations

IBM 1 Series
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Receive
Operations
Figure
4-6
depicts
timing
for
receive
operations.
Timings
are
depicted
at
device-rated
operation.
T,,
is
the
time
of a
receive
operation
from
initiation
by
the
device
to
the
posting
of
an
interrupt.
It
is
nine
bit
times
at
the
selected
frequency.
At
9600
bps,
T,,
=
0.936
ms;
at
110
bps,
T,,
=
81.9
ms.
On
receive
operations,
an
attention
interrupt
is
posted
at
the
leading
edge
of
the
first
stop-bit
time
for
that
character.
The
interrupt
accept
and
read
(IA
&
R)
must
be
done
before
the
leading
edge
of
the
first
stop
bit
time
of
the
next
character
to
prevent
overrun.
T,
is
equal
to
the
maximum
permissible
time
the
processor
can
delay
in
performing
an
interrupt
accept
and
read
after
an
attention
interrupt
is
posted.
T,
is
equal
to
the
number
of
stop
bits
sent,
plus
one
(start
bit),
plus
the
number
of
data
bits
sent,
all
multiplied
by
one
bit
time.
Note
that
by
programming
the
device
for
two
stop
bits,
T,
(the
amount
of
time
the
program
has
to
handle
the
attention
interrupt)
may
be
increased
by
approximately
10
percent.
Assuming
one
stop
bit
and
eight
data
bits,
at
9600
bps,
T,
=
1.01
ms;
at
110
bps,
T,
=
90.8
ms.
Figure
4-6
is
a
state
and
timing
diagram
of
possible
receive
sequences.
Teletypewriter
Adapter
Feature
4-17

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