IBM 1 Series - Page 86

Line name
Address bus bit 0
Address bus bit 1
Address bus bit 2
Address bus bit 3
Address bus bit 4
Address bus bit 5
Address bus bit 6
Address bus bit 7
Address bus bit 8
Address bus bit 9
Address bus bit 10
Address bus bit 11
Address bus bit 12
Address bus bit 13
Address bus bit 14
Address bus bit 15
Address bus bit 16
Address gate
Address gate return
Burst return
Condition code in bit 0
Condition code in bit 1
Condition code in bit 2
Cycle byte indicator
Cycle input indicator
Cycle steal request in
Data bus bit 0
Data bus bit 1
Data bus bit 2
Data bus bit 3
Data bus bit 4
Data bus bit 5
Data bus bit 6
Data bus bit 7
Data bus bit PO
Data bus bit 8
Data bus bit 9
Data bus bit 10
Data bus bit 11
Data bus bit 12
Data bus bit 13
Data bus bit 14
Data bus bit 15
Data bus bit P1
Direction
I/O pin
assignment
BO2
BO3
B04
BO5
BO7
BO8
BO9
B10
B12
D02
D04
DO05
D06
D07
DO09
D10
Di1
M08
M09
P04
D12
D13
B13
P10
PO9
M02
G02
G03
G04
G05
G07
G08
G09
G10
G12
J02
J04
JO5
J06
JO7
JO9
J10
Jil
J12
TCC
pin no.
W22
W23
W24
W25
W27
W28
W29
W30
W32
Wwo02
W04
W05
W06
W07
W09
W10
Wii
¥28
Y29
Y04
Wi12
W13
W335
Y10
Y09
Y¥22
X22
X23
X24
X25
X27
X28
X29
X30
X32
X02
X04
X05
X06
X07
X09
X10
X11
X12
Figure 2-33 (Part 1 of 2). Channel repower feature pin assignments
Processor I/O Channel 2-75