IDEC MICROSmart FC6A Series - Page 417

FC6A S ERIES MICROS MART U SER ’ S M ANUAL FC9Y-B1722 6-33
6: D EVICES
■ D8104, D8204, D8717, D8720, D8723, D8726, D8729, D8732: Control Signal Status (Port 1 to 33)
The signal statuses of the DSR and DTR controls lines are written to this register. This register is updated in END processing
when stopped and while running. The allocation of communication ports in the device (bit assignment) is as follows.
Port 1
Port 2
Port 3
Port 4
Port 5
D8104
Bit
15
Bit
0
Bit
7
Bit
8 12 3 4569
Port 6
Port 7
Port 8
Port 9
D8204
Bit
15
Bit
0
Bit
7
Bit
8 12 3 456
Port 10
Port 11
Port 12
Port 13
D8717
Bit
15
Bit
0
Bit
7
Bit
8 12 3 456
Port 14
Port 15
Port 16
Port 17
D8720
Bit
15
Bit
0
Bit
7
Bit
8 12 3 456
Port 18
Port 19
Port 20
Port 21
D8723
Bit
15
Bit
0
Bit
7
Bit
8 12 3 456
Port 22
Port 23
Port 24
Port 25
D8726
Bit
15
Bit
0
Bit
7
Bit
8 12 3 456
Port 26
Port 27
Port 28
Port 29
D8729
Bit
15
Bit
0
Bit
7
Bit
8 12 3 456