A-19
INSTRUCTION SET REFERENCE
Table A-24. Summary of Move Instructions
Move (2) MOV <dest>,<src> destination ← src opnd
Move with Sign Extension MOVS <dest>,<src> destination ← src opnd with sign extend
Move with Zero Extension MOVZ <dest>,<src> destination ← src opnd with zero extend
Move Code Byte MOVC <dest>,<src> A ← code byte
Move to External Mem MOVX <dest>,<src> external mem ← (A)
Move from External Mem MOVX <dest>,<src> A ← source opnd in external mem
Mnemonic <dest>,<src> Notes
Binary Mode Source Mode
Bytes States Bytes States
MOV
A,Rn Reg to acc 1 1 2 2
A,dir8 Dir byte to acc 2 1 (3) 2 1 (3)
A,@Ri Indir RAM to acc 1 2 2 3
A,#data Immediate data to acc 2 1 2 1
Rn,A Acc to reg 1122
Rn,dir8 Dir byte to reg 2 1 (3) 3 2 (3)
Rn,#data Immediate data to reg 2 1 3 2
dir8,A Acc to dir byte 2 2 (3) 2 2 (3)
dir8,Rn Reg to dir byte 2 2 (3) 3 3 (3)
dir8,dir8 Dir byte to dir byte 3 3 3 3
dir8,@Ri Indir RAM to dir byte 2 3 3 4
dir8,#data Immediate data to dir byte 3 3 (3) 3 3 (3)
@Ri,A Acc to indir RAM 1 3 2 4
@Ri,dir8 Dir byte to indir RAM 2 3 3 4
@Ri,#data Immediate data to indir RAM 2 3 3 4
DPTR,#data16 Load Data Pointer with a 16-bit const 3 2 3 2
Rmd,Rms Byte reg to byte reg 3 2 2 1
WRjd,WRjs Word reg to word reg 3 2 2 1
DRkd,DRks Dword reg to dword reg 3 3 2 2
Rm,#data 8-bit immediate data to byte reg 4 3 3 2
WRj,#data16 16-bit immediate data to word reg 5 3 4 2
DRk,#0data16 zero-extended 16-bit immediate data
to dword reg
5544
DRk,#1data16 one-extended 16-bit immediate data
to dword reg
5544
NOTES:
1. A shaded cell denotes an instruction in the MCS
®
51 architecture.
2. Instructions that move bits are in Table A-26 on page A-23.
3. If this instruction addresses an I/O port (P
x
,
x
= 0–3), add 1 to the number of states.
4. External memory addressed by instructions in the MCS 51 architecture is in the region specified by
DPXL (reset value = 01H). See section 3.1.1, “Compatibility with the MCS® 51 Architecture.”
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