Appendix C: Integrated BMC Sensor Tables Intel® Server Board S2600CO Family TPS
Revision 1.4
Intel order number G42278-004
128
Full Sensor Name
(Sensor name in SDR)
Sensor
#
Platform
Applicability
Sensor Type
Event/
Reading
Type
Event Offset Triggers Contrib. To
System Status
Assert/
De-
assert
Readable
Value/
Offsets
Event
Data
Rearm
Stand-
by
Processor 1 Thermal Margin
(P1 Therm Margin)
74h All
Temperature
01h
Threshold
01h
- - - Analog R, T A –
Processor 2 Thermal Margin
(P2 Therm Margin)
75h All
Temperature
01h
Threshold
01h
- - - Analog R, T A –
Processor 1 Thermal
Control %
(P1 Therm Ctrl %)
78h All
Temperature
01h
Threshold
01h
[u] [c,nc]
nc =
Degraded
c = Non-fatal
As
and
De
Analog Trig Offset A –
Processor 2 Thermal
Control %
(P2 Therm Ctrl %)
79h All
Temperature
01h
Threshold
01h
[u] [c,nc]
nc =
Degraded
c = Non-fatal
As
and
De
Analog Trig Offset A –
Processor 1 ERR2 Timeout
(P1 ERR2)
7Ch All
Processor
07h
Digital
Discrete
03h
01 – State Asserted fatal
As
and
De
– Trig Offset A –
Processor 2 ERR2 Timeout
(P2 ERR2)
7Dh All
Processor
07h
Digital
Discrete
03h
01 – State Asserted fatal
As
and
De
– Trig Offset A –
Catastrophic Error
(CATERR)
80h All
Processor
07h
Digital
Discrete
03h
01 – State Asserted fatal
As
and
De
– Trig Offset M –
Processor0 MSID Mismatch
(P0 MSID Mismatch)
81h All
Processor
07h
Digital
Discrete
03h
01 – State Asserted fatal
As
and
De
– Trig Offset M –
Processor Population Fault
(CPU Missing)
82h All
Processor
07h
Digital
Discrete
03h
01 – State Asserted Fatal
As
and
De
– Trig Offset M –
Processor1 MSID Mismatch
(P1 MSID Mismatch)
87h All
Processor
07h
Digital
Discrete
03h
01 – State Asserted fatal
As
and
De
– Trig Offset M –
Processor 1 VRD
Temperature
(P1 VRD Hot)
90h All
Temperature
01h
Digital
Discrete
05h
01 - Limit exceeded Non-fatal
As
and
De
– Trig Offset M –