Intel® Xeon™ Processor with 800 MHz System Bus
4 Datasheet
6.0 Thermal Specifications .............................................................................................................. 67
6.1 Package Thermal Specifications ........................................................................................67
6.1.1 Thermal Specifications ..........................................................................................67
6.1.2 Thermal Metrology.................................................................................................71
6.2 Processor Thermal Features ..............................................................................................71
6.2.1 Thermal Monitor.....................................................................................................71
6.2.2 On-Demand Mode .................................................................................................72
6.2.3 PROCHOT# Signal Pin..........................................................................................72
6.2.4 FORCEPR# Signal Pin .......................................................................................... 72
6.2.5 THERMTRIP# Signal Pin.......................................................................................73
6.2.6 TCONTROL and Fan Speed Reduction ................................................................ 73
6.2.7 Thermal Diode ....................................................................................................... 73
7.0 Features........................................................................................................................................ 75
7.1 Power-On Configuration Options........................................................................................ 75
7.2 Clock Control and Low Power States .................................................................................75
7.2.1 Normal State..........................................................................................................76
7.2.2 HALT Power-Down State.......................................................................................76
7.2.3 Stop-Grant State....................................................................................................76
7.2.4 HALT Snoop State or Snoop State........................................................................77
7.2.5 Sleep State ............................................................................................................ 77
7.3 Demand-Based Switching (DBS) with Enhanced Intel SpeedStep® Technology .............. 78
8.0 Boxed Processor Specifications................................................................................................79
8.1 Introduction .........................................................................................................................79
8.2 Mechanical Specifications ..................................................................................................81
8.2.1 Boxed Processor Heatsink Dimensions (CEK)...................................................... 81
8.2.2 Boxed Processor Heatsink Weight ........................................................................ 89
8.2.3 Boxed Processor Retention Mechanism and Heatsink Support (CEK) .................89
8.3 Electrical Requirements......................................................................................................89
8.3.1 Fan Power Supply (active CEK) ............................................................................89
8.4 Thermal Specifications .......................................................................................................92
8.4.1 Boxed Processor Cooling Requirements...............................................................92
8.5 Boxed Processor Contents ................................................................................................. 93
9.0 Debug Tools Specifications ....................................................................................................... 95
9.1 Debug Port System Requirements .....................................................................................95
9.2 Target System Implementation........................................................................................... 95
9.2.1 System Implementation ......................................................................................... 95
9.3 Logic Analyzer Interface (LAI) ........................................................................................... 95
9.3.1 Mechanical Considerations.................................................................................... 96
9.3.2 Electrical Considerations .......................................................................................96