Intel® Xeon™ Processor with 800 MHz System Bus
30 Datasheet
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. The V
TT
represented in these specifications refers to instantaneous V
TT
.
3. V
IL
is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.
4. V
IH
is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.
5. V
IH
and V
OH
may experience excursions above V
TT
.
6. Refer to Table 2-5 to determine which signals include additional on-die termination resistance (R
L
).
7. Leakage to V
SS
with pin held at V
TT
.
8. Leakage to V
TT
with pin held at 300 mV.
Table 15. GTL+ Asynchronous and AGTL+ Asynchronous Signal Group DC Specifications
Symbol Parameter Min Max Unit Notes
1
V
IL
Input Low Voltage 0.0 GTLREF - (0.10 * V
TT
)V 2,3
V
IH
Input High Voltage GTLREF + (0.10 * V
TT
)V
TT
V2,4,5
V
OH
Output High Voltage 0.90 * V
TT
V
TT
V2,5
I
OL
Output Low Current N/A V
TT
/
(0.50 * R
TT_MIN
+
[R
ON_MIN
|| R
L
])
mA 2,6
I
LI
Input Leakage Current N/A ± 200 µA 7,8
I
LO
Output Leakage Current N/A ± 200 µA 7,8
R
on
Buffer On Resistance 7 11 W
Table 16. VIDPWRGD DC Specifications
Symbol Parameter Min Max Unit
V
IL
Input Low Voltage 0.0 0.30 V
V
IH
Input High Voltage 0.90 V
TT
V