JVC MX-GA77 - M11 L1644 (Ic602): Dram

MX-GA77
1-40
1. Block diagram
M11L1644 (IC602) : DRAM
2. Pin function
Pin No.
3~11, 14~19, 7
5
21
4
20
2, 3,22, 23
1, 12
13, 24
6
Symbol
A0~A10
RAS
CAS
WE
OE
I/O0~I/O3
Vcc
Vss
NC
Function
Address Input
Row Address : A0~A10
Column Address : A0~A10
Row Address Strobe
Column Address Strobe
Write Enable
Output Enable
Data Input/ Ountput
Power (5V or 3.3V)
Ground
No Connect
11
11
11
11
11
4
4
4
CONTROL
LOGIC
CLOCK
GENERATOR
COLUMN
ADDRESS
BUFFER
REFRESH
CONTROLLER
REFRESH
COUNTER
ROW
ADDRESS
BUFFERS(11)
DATA-IN BUFFER
DATA-OUT
BUFFER
COLUMN
DECODER
SENSE AMPLIFIERS
I/O RATING
2048 x 4
2048 x 2048 x 4
MEMORY
ARRAY
ROW
DECODER
Vdd GENERATOR
2048
2048
WE
RAS
CAS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
I/O0
.
.
I/O3
CE
Vcc
Vss
I/O
I
I
I
I
I
I/O
-