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Lattice Semiconductor MIPI User Manual

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MIPI DSI to OpenLDI/FPD-Link/LVDS Interface Bridge Soft IP
User Guide
© 2016 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
14 FPGA-IPUG-02003-1.2
Table 2.4. Supported Data Rates for MIPI DSI to OpenLDI/FPD-Link/LVDS Interface Bridge IP Configurations
Configuration
D-PHY line rate
(Mb/s)
DCK
(MHz)
Data Type
RX_GEAR
TX_GEAR
Single DSI to Single FPD-Link
RGB666
8
7
160 675
40 337.5
14
675 771.42
337.5 385.74
RGB888 /
RGB666_LOOSE
8
7
160 900
40 450
16
14
900 1028.57
450 514.28
Single DSI to Dual FPD-Link
RGB666
8
7
160 900
40 450
16
14
900 1500
450 750
RGB888 /
RGB666_LOOSE
8
7
160 900
40 450
16
14
900 1500
450 750
Dual DSI to Dual FPD-Link
Same as Single DSI to Single FPD-Link

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Lattice Semiconductor MIPI Specifications

General IconGeneral
BrandLattice Semiconductor
ModelMIPI
CategoryRecording Equipment
LanguageEnglish

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