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Lattice Semiconductor MIPI - Default Chapter; Table of Contents

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MIPI DSI to OpenLDI/FPD-Link/LVDS Interface Bridge Soft IP
User Guide
© 2016 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are
trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
2 FPGA-IPUG-02003-1.2
Contents
1. Introduction .................................................................................................................................................................. 4
1.1. Quick Facts .......................................................................................................................................................... 4
1.2. Features ............................................................................................................................................................... 5
1.3. Conventions......................................................................................................................................................... 5
1.3.1. Nomenclature ................................................................................................................................................. 5
1.3.2. Data Ordering and Data Types ....................................................................................................................... 5
1.3.3. Signal Names .................................................................................................................................................. 5
2. Functional Description .................................................................................................................................................. 6
2.1. Top....................................................................................................................................................................... 6
2.2. D-PHY Common Interface Wrapper .................................................................................................................. 10
2.3. Rx Global Operations Controller ....................................................................................................................... 10
2.4. Capture Controller ............................................................................................................................................. 11
2.5. Byte2Pixel .......................................................................................................................................................... 12
2.6. Lane Distribution ............................................................................................................................................... 12
2.7. LVDS Wrapper ................................................................................................................................................... 12
2.8. Reset and Clocking ............................................................................................................................................ 13
3. Parameter Settings ..................................................................................................................................................... 15
4. IP Generation and Evaluation ..................................................................................................................................... 16
4.1. Licensing the IP .................................................................................................................................................. 16
4.2. Getting Started .................................................................................................................................................. 16
4.3. Generating IP in Clarity Designer ...................................................................................................................... 17
4.4. Generated IP Directory Structure and Files ....................................................................................................... 20
4.5. Running Functional Simulation ......................................................................................................................... 21
4.6. Simulation Strategies ........................................................................................................................................ 23
4.7. Simulation Environment .................................................................................................................................... 23
4.8. Instantiating the IP ............................................................................................................................................ 24
4.9. Synthesizing and Implementing the IP .............................................................................................................. 24
4.10. Hardware Evaluation ......................................................................................................................................... 25
4.10.1. Enabling Hardware Evaluation in Diamond .................................................................................................. 25
4.11. Updating/Regenerating the IP........................................................................................................................... 26
4.11.1. Regenerating an IP in Clarity Designer ......................................................................................................... 26
References .......................................................................................................................................................................... 27
Technical Support Assistance ............................................................................................................................................. 27
Appendix A. Resource Utilization ....................................................................................................................................... 28
Appendix B. What is Not Supported ................................................................................................................................... 29
Revision History .................................................................................................................................................................. 30

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