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General| Brand | Mitsubishi |
|---|---|
| Model | QCPU (Q Mode) |
| Category | Controller |
| Language | English |
Precautions related to the design of the PLC system and external circuits to ensure safety.
Details the new features and improvements of the High Performance model QCPU.
Explains how programs are managed, constructed, and organized within the QCPU.
Describes devices and instructions that facilitate program creation and flexibility.
Outlines the equipment configuration, peripheral devices, and system setup for the QCPU system.
Discusses hardware and software package compatibility and limitations for QCPU system configuration.
Defines sequence programs, their types (main, sub-routine, interrupt), and basic structure.
Explains the different types of program execution (Initial, Scan, Low speed, Stand-by, Fixed scan) and how to set them.
Describes the initial processing, I/O refresh, automatic refresh, and END processing steps.
Explains the operation processing for RUN, STOP, and PAUSE statuses of the High Performance QCPU.
Explains the data clearing process, including device latch specification.
Covers the use of BIN, HEX, BCD, and Real number notations in sequence programs.
Explains the relationship between extension base unit stages, slots, and module installation limits.
Details the types of extension base units and the procedure for setting stage numbers.
Explains the "Auto" and "Detail" modes for assigning modules to base units.
Explains the concept of I/O number assignment for main and extension base units.
Describes the purpose and concept of I/O assignment using GX Developer.
Provides examples of I/O number assignment using GX Developer, including changing points for empty slots.
Details the QCPU's built-in memory types and memory card usage.
Explains the program memory, its data storage, and formatting procedures.
Describes the standard ROM's purpose, data storage, and memory capacity.
Explains the standard RAM's function, stored data, and formatting.
Details the types of memory cards supported, their capacities, and precautions.
Explains how to write data to standard ROM or Flash card using GX Developer.
Explains how to execute programs stored in standard ROM or memory cards.
Details the structure of program files, including file header, execution program, and memory allocation.
Provides a comprehensive list of functions and their corresponding reference sections.
Explains the constant scan function for maintaining a constant scan time.
Describes latch functions, their availability, and how to set the latch range.
Explains how to set the output status when switching between RUN and STOP statuses.
Details the clock function for reading and using time data for system management.
Covers remote operations like RUN/STOP, PAUSE, RESET, and latch clear.
Covers selecting response times for input, high-speed input, and interrupt modules.
Guides on setting switches for intelligent function modules using GX Developer.
Describes the monitoring functions available through GX Developer.
Explains how to write programs or files while the QCPU is in RUN status.
Describes functions for displaying and measuring program execution times.
Explains the sampling trace function for checking device contents during debugging.
Describes debugging capabilities for multiple users simultaneously.
Describes the watch dog timer function for detecting hardware and program errors.
Explains the self-diagnosis function for detecting and displaying errors.
Covers system protection functions like password registration and remote passwords.
Details how to monitor QCPU system status using GX Developer's System Monitor.
Explains the status indicated by the LEDs on the High Performance model QCPU.
Covers the high-speed interrupt function for running programs with fixed-cycle interrupts.
Explains how to monitor the service interval time of modules.
Details methods for communication between QCPU and intelligent function modules.
Explains initial and automatic refresh settings for intelligent modules using GX Configurator.
Covers using device initial values to set up intelligent function modules without a program.
Explains communication with intelligent function modules using FROM/TO instructions.
Describes how to use intelligent function module devices for communication.
Details instructions dedicated to intelligent function modules for programming.
Explains how intelligent function modules can request interrupts to the QCPU.
Covers communication between QCPU and AnS series special function modules.
Explains using device initial values for special function modules.
Details communication with special function modules using FROM/TO instructions.
Discusses effects of quick access to special function modules and countermeasures.
Provides a detailed list of PLC parameters, their numbers, descriptions, and reference sections.
Lists names and data ranges of devices usable in the High Performance model QCPU.
Covers internal user devices, their usable points, and memory capacity calculations.
Defines inputs (X) and explains how they are used in programs.
Defines outputs (Y) and describes their usage and external output procedures.
Explains the definition and usage of internal relays (M).
Describes latch relays (L), their definition, and precautions.
Explains annunciators (F) used for fault detection programs.
Details edge relays (V) used for detecting leading edges.
Covers link relays (B) for MELSECNET/H network module communication.
Explains link special relays (SB) for communication status and error detection.
Defines step relays (S) as SFC program devices.
Describes timers (T), their types, measurement units, and processing.
Explains counters (C), their definition, count processing, and resetting.
Details data registers (D) for storing numeric data.
Covers link registers (W) for storing numeric data and network communication.
Explains link special registers (SW) for storing communication status and errors.
Describes internal system devices used for system operations.
Details function devices (FX, FY, FD) used for data transfers in sub-routine programs.
Explains the purpose and classification of special relays (SM).
Describes the purpose and classification of special registers (SD).
Covers link direct devices used for accessing link devices in network modules.
Explains how QCPU directly accesses buffer memories of intelligent function modules.
Details index registers (Z) used for indirect setting and index modification.
Explains index register processing when switching between scan and low speed execution types.
Covers index register switching between different program types.
Describes file registers (R) as expansion devices for data registers.
Details the capacity of file registers in standard RAM, SRAM, and Flash cards.
Guides on registering file registers with the QCPU.
Describes nesting devices for MC or MCR master control instructions.
Explains pointer devices used in jump and sub-routine call instructions.
Details local pointers for independent use in programs.
Explains common pointers for calling sub-routines across all programs.
Describes interrupt pointers used as labels for interrupt programs.
Covers other devices like SFC block and network designation devices.
Explains decimal and hexadecimal constants used in sequence programs.
Explains convenient uses for devices, including global and local devices.
Differentiates between global and local devices and their usage.
Explains using device initial values to set data without a program.
Explains how to calculate scan time by summing I/O refresh, instruction execution, and END processing times.
Lists functions that increase scan time, such as network refresh and sampling trace.
Details the steps and considerations for writing a single program to the QCPU.
Explains the procedure for writing and executing multiple programs.
Highlights the advantages of multiple PLC systems, such as multi-control and load dispersion.
Explains what a multiple PLC system is and its configuration.
Compares multiple PLC systems with single CPU systems, noting differences in function versions, mounting, parameters, and I/O numbers.
Details the equipment configuration for multiple PLC systems.
Covers precautions for configuring multiple PLC systems, including function versions and mounting positions.
Explains allowable function versions and mounting positions for QCPU, motion, and PC CPU modules in multiple PLC systems.
Lists precautions when using Q Series I/O and intelligent function modules in multiple PLC systems.
Details limitations when mounting AnS Series I/O and special function modules.
Lists compatible GX Developers and GX Configurators for multiple PLC systems.
Covers parameters required for enabling multiple PLC system operation.
Explains the procedure and precautions for resetting a multiple PLC system.
Details how the system handles stop errors in PLC No.1 and other PLCs.
Provides methods for reducing processing time in multiple PLC systems.
Discusses the concept of I/O number allocation for interactive transmission.
Covers I/O numbers for modules mounted on base units and the "00H" position.
Explains the purpose of PC parameter I/O allocations using GX Developer.
Explains automatic refresh of CPU shared memory for data transfer between CPUs.
Details communication using S. TO, FROM instructions and intelligent function module devices.
Covers control commands and device data read/write between QCPU and Motion CPU.
Describes the structure and usage of CPU shared memory.
Describes the communication range between control PLCs and control modules.
Covers communication possibilities for non-control PLCs.
Explains loading input data from modules controlled by other PLCs.
Details loading output data from modules controlled by other PLCs.
Covers accessing MELSECNET/H modules, noting restrictions.
Explains the concept of scanning time in multiple PLC systems.
Lists functions that prolong scan time, such as network refresh and sampling trace.
Outlines the step-by-step process for starting up a multiple PLC system.
Details procedures for setting up multiple PLC system parameters using GX Developer.
Provides an example procedure for setting up multiple PLC system parameters.
Guides on creating new multiple PLC system configurations.
Explains how to transfer and use existing multiple PLC settings and I/O allocations.
Lists and explains special relays (SM) used in the PLC for system control.
Lists and explains special registers (SD) used for storing QCPU status data.
Provides a list of interrupt pointers and their associated interrupt factors.
