molex SST-DN4-PCU - Page 29

Hardware Reference Guide SST-DN4-PCU
Hardware Register Details 29
©2009 Molex Inc.Automation & Electrical Products, Integrated Products Division
Document Edition: 1.0, Document #: 715-0101, Template Edition: 1.1, Template #: QMS-06-045
Use, duplication or disclosure of this document or any of the information contained herein is subject to the restrictions on page ii of this document.
Table 4: Card Configuration Space
In this table, information relevant to the card is bolded.
PCI CFG
Register
Address
Register Function
32 24 23 16 15 8 7 0
PCI
Writable
0000H Device ID
0x9030
Vendor ID
0x10B5
N
0004H Status
0x0000
Command
0x0000
Y
0008H Class Code
0x0280000
Revision ID
Factory set
N
000CH BIST
0x00
Header ID
0x00
PCI Latency
0x00
CacheLineSize
0x00
Y[7:0]
0010H PCI Base Address 0 for Memory-Mapped Config Registers Y
0014H PCI Base Address 1 for I/O-Mapped Config Registers Y
0018H PCI Base Address 2 for Local Address Space 0
Shared RAM Access Window for all channels
Y
001CH PCI Base Address 3 for Local Address Space 1
I/O Space Access Window for all channels
Y
0020H PCI Base Address 4 for Local Address Space 2 Y
0024H PCI Base Address 5 for Local Address Space 3 Y
0028H Cardbus CIS Pointer (Not supported) N
002CH Subsystem Device ID
0x003A
Subsystem Vendor ID
0x133D
N
0030H PCI Base Address for Local Expansion
ROM
0x00000000
Y
0034H Reserved
0x00000000
N
0038H Reserved
0x00000000
N
003CH Max_Lat
0x00
Min_Gnt
0x00
Interrupt Pin
0x01
Interrupt Line
0x00
Y[7:0]