Neoway N720 - Figure 2-17 Reference Design of the UART Interface; Uart

N720 Hardware User Guide
Copyright © Neoway Technology Co., Ltd 24
UART2_RXD
47
DI
UART data receive
UART2_CTS
51
DI
Clear to send
UART2_RTS
52
DO
Request to send
ADC2
88
AI
ADC2 input
15-bit, detectable voltage
range: 0.1 V to 1.7 V
ADC1
89
AI
ADC1 input
RING
13
DO
Incoming call ring
Support only host mode
DTR
79
DI
Sleep mode control
NET_LIGHT
83
DO
Network status indicator control
Support only host mode
2.6.1 UART
N720 provides 1 UART interface, which support hardware flow control and 4 Mbps at most. The high
level is 1.8V. Figure 2-17 shows the reference design of the UART interface.
Figure 2-17 Reference design of the UART interface
RXD
TXD
RTS
CTS
MCU_TXD
MCU_RXD
MCU_CTS
MCU_RTS
GND GND
N720
Client
If the UART does not match the logic voltage of the MCU, add a level shifting circuit outside of the
module as shown in Figure 2-18 (for V
IL
≤200 mV) and Figure 2-19 (for V
IL
>200 mV).