Do you have a question about the Nvidia Jetson Orin NX Series and is the answer not in the manual?
Networking | Gigabit Ethernet |
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Module Size | 69.6 mm x 45 mm |
Operating System | Linux (JetPack SDK) |
GPU | NVIDIA Ampere architecture with 1024 CUDA cores |
CPU | 8-core ARM Cortex-A78AE v8.2 64-bit CPU |
Memory | 16GB 128-bit LPDDR5 |
Storage | eMMC 5.1 |
AI Performance | 100 TOPS (INT8) |
Camera | Up to 6 cameras (24 via virtual channels) CSI camera |
Power | 15W to 25W |
Video Encode | 1x 4Kp60 | 2x 4Kp30 | 4x 1080p60 |
Connectivity | PCIe Gen4 |
Other I/O | GPIO, I2C, SPI, UART, CAN |
List of documents and models for additional information and support.
Lists files attached to the design guide for download and reference.
Defines abbreviations and acronyms used throughout the design guide.
Explains booting via QSPI and secondary storage options.
Details USB recovery mode for flashing images and development.
Describes the button power MCU and its firmware integration.
Details the 260-pin SODIMM connector used for modules.
Covers mechanical mounting and grounding for the Orin module.
Explains the power supply and sequencing for the Jetson Orin module.
Details the power button supervisor MCU and its role in system power control.
Describes signal behavior and de-bounce times for power triggers.
Explains the power-on sequence using the power button.
Details the auto power-on sequence via ACOK.
Describes shutdown for long power button presses.
Overview of USB 2.0 and USB 3.2 port support.
Specifies routing requirements for USB 2.0 controller PHY interfaces.
Details routing requirements for USB 3.2 PHY interfaces.
Explains PCIe interface capabilities and lane configurations.
Provides routing guidelines for PCIe Gen3 and Gen4.
Covers Embedded DisplayPort (eDP) and DisplayPort (DP) interfaces.
Details the HDMI interface capabilities and connections.
Provides routing guidelines for HDMI interface signal integrity.
Describes routing guidelines for MIPI CSI camera interfaces.
Specifies routing guidelines for I2S audio interfaces.
Covers the four I2C interfaces available on the Orin module.
Guidelines for I2C peripheral design and address management.
Specific routing guidelines for I2C interfaces.
Details the two SPI interfaces available on the Orin module.
Provides routing guidelines for SPI interfaces.
Outlines the three UART interfaces and their typical assignments.
Covers the single CAN interface available on the Orin module.
Information on PWM and Tachometer for fan control.
Details the UART interface intended for debugging.
Addresses internal pull-ups on MPIO pads powered at 1.8V during Power-On.
Discusses the Schmitt-trigger mode option for MPIO pins.
Identifies pins pulled high during power-on and design considerations.
Lists MPIO pins supporting SFIO and GPIO that can be left unconnected.
Refers to SFIO interface pins for unused dedicated purposes.
Explains mnemonics and conventions used for signal naming.
Describes the format used for specifying routing guidelines.
Details the signal routing conventions used.
Overview of routing rules for high-speed interfaces.
Provides PCB routing guidelines for crosstalk minimization.
Lists common requirements for high-speed interfaces.
Recommendations for including test points for high-speed interfaces.
Techniques to mitigate USB 3.2 noise affecting wireless subsystems.