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Nvidia Jetson Orin NX Series User Manual

Nvidia Jetson Orin NX Series
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DG-10931-001_v1.1 | April 2023
PRELIMINARY INFORMATION SUBJECT TO CHANGE
Jetson Orin NX Series and Jetson Orin
Nano Series
Product Design Guide

Table of Contents

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Nvidia Jetson Orin NX Series Specifications

General IconGeneral
NetworkingGigabit Ethernet
Module Size69.6 mm x 45 mm
Operating SystemLinux (JetPack SDK)
GPUNVIDIA Ampere architecture with 1024 CUDA cores
CPU8-core ARM Cortex-A78AE v8.2 64-bit CPU
Memory16GB 128-bit LPDDR5
StorageeMMC 5.1
AI Performance100 TOPS (INT8)
CameraUp to 6 cameras (24 via virtual channels) CSI camera
Power15W to 25W
Video Encode1x 4Kp60 | 2x 4Kp30 | 4x 1080p60
ConnectivityPCIe Gen4
Other I/OGPIO, I2C, SPI, UART, CAN

Summary

Chapter 1. Introduction

1.1 References

List of documents and models for additional information and support.

1.2 Attachments

Lists files attached to the design guide for download and reference.

1.3 Abbreviations and Definitions

Defines abbreviations and acronyms used throughout the design guide.

Chapter 2. Jetson Orin Module

Chapter 3. Jetson Orin Module Boot Considerations

3.1 QSPI Boot

Explains booting via QSPI and secondary storage options.

3.2 USB Recovery Mode

Details USB recovery mode for flashing images and development.

Chapter 4. Developer Kit Feature Considerations

4.1 Button Power MCU

Describes the button power MCU and its firmware integration.

Chapter 5. Modular Connector

5.1 Module Connector Details

Details the 260-pin SODIMM connector used for modules.

5.2 Module to Mounting Hardware

Covers mechanical mounting and grounding for the Orin module.

Chapter 6. Power

6.1 Power Supply and Sequencing

Explains the power supply and sequencing for the Jetson Orin module.

6.1.1 Power Button Supervisor MCU Power-On

Details the power button supervisor MCU and its role in system power control.

6.1.1.1 Defined Behaviors

Describes signal behavior and de-bounce times for power triggers.

6.1.1.2 Power-Off -> Power-On (Power Button Case)

Explains the power-on sequence using the power button.

6.1.1.3 Power-Off -> Power-On (Auto-Power-On Case)

Details the auto power-on sequence via ACOK.

6.1.1.4 Power-On -> Power-Off (Long Power Button Press)

Describes shutdown for long power button presses.

Chapter 7. USB and PCIe

7.1 USB

Overview of USB 2.0 and USB 3.2 port support.

7.1.1 USB 2.0 Routing Guidelines

Specifies routing requirements for USB 2.0 controller PHY interfaces.

7.1.2 USB 3.2 Routing Guidelines

Details routing requirements for USB 3.2 PHY interfaces.

7.2 PCIe

Explains PCIe interface capabilities and lane configurations.

7.2.1 PCIe Routing Guidelines

Provides routing guidelines for PCIe Gen3 and Gen4.

Chapter 9. Display

9.1 eDP and DP

Covers Embedded DisplayPort (eDP) and DisplayPort (DP) interfaces.

9.2 HDMI

Details the HDMI interface capabilities and connections.

9.2.1 HDMI Routing Guidelines

Provides routing guidelines for HDMI interface signal integrity.

Chapter 10. MIPI CSI Video Input

10.1 CSI Routing Guidelines

Describes routing guidelines for MIPI CSI camera interfaces.

Chapter 11. Audio

11.1.1 I2S Routing Guidelines

Specifies routing guidelines for I2S audio interfaces.

Chapter 12. Miscellaneous Interfaces

12.1 I2C

Covers the four I2C interfaces available on the Orin module.

12.1.1 I2C Design Guidelines

Guidelines for I2C peripheral design and address management.

12.1.2 I2C routing Guidelines

Specific routing guidelines for I2C interfaces.

12.2 SPI

Details the two SPI interfaces available on the Orin module.

12.2.1 SPI Routing Guidelines

Provides routing guidelines for SPI interfaces.

12.3 UART

Outlines the three UART interfaces and their typical assignments.

12.4 CAN

Covers the single CAN interface available on the Orin module.

12.5 Fan

Information on PWM and Tachometer for fan control.

12.6 Debug

Details the UART interface intended for debugging.

Chapter 13. PADS

13.1 Internal Pull-Ups for Dual Voltage Block Pins Power at 1.8V

Addresses internal pull-ups on MPIO pads powered at 1.8V during Power-On.

13.2 Schmitt Trigger Usage

Discusses the Schmitt-trigger mode option for MPIO pins.

13.3 Pins Pulled or Driven High During Power-On

Identifies pins pulled high during power-on and design considerations.

Chapter 14. Unused Interface Terminations

14.1 Unused Multi-Purpose Standard CMOS Pad Interfaces

Lists MPIO pins supporting SFIO and GPIO that can be left unconnected.

14.2 Unused Dedicated Special Purpose Pad Interfaces

Refers to SFIO interface pins for unused dedicated purposes.

Chapter 15. Design and Bring-Up Checklists

Chapter 16. Orin Module Pin Descriptions

Chapter 17. General Routing Guidelines

17.1 Signal Naming Convention

Explains mnemonics and conventions used for signal naming.

17.2 Routing Guidelines Format

Describes the format used for specifying routing guidelines.

17.3 Signal Routing Conventions

Details the signal routing conventions used.

17.4 Routing Guidelines

Overview of routing rules for high-speed interfaces.

17.4.1 General PCB Routing Guidelines

Provides PCB routing guidelines for crosstalk minimization.

17.5 Common High-Speed Interface Requirements

Lists common requirements for high-speed interfaces.

17.6 Test Points for High-Speed Interfaces

Recommendations for including test points for high-speed interfaces.

Chapter 18. USB 3.2 and Wireless Coexistence

18.1 Mitigation Techniques

Techniques to mitigate USB 3.2 noise affecting wireless subsystems.

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