Do you have a question about the Nvidia JETSON TX2 and is the answer not in the manual?
Storage | 32 GB eMMC 5.1 |
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Operating System | Linux for Tegra |
GPU | NVIDIA Pascal architecture with 256 CUDA cores |
Memory | 8 GB LPDDR4 |
Connectivity | 802.11ac WLAN, Bluetooth |
Video Decode | 4K @ 60 fps (HEVC), 4K @ 60 fps (H.264) |
Power | 7.5W | 15W |
Camera | Up to 6 cameras (CSI) |
USB | USB 3.0 |
Others | CAN, UART, SPI, I2C, GPIOs |
CPU | Dual Denver 2 64-Bit CPUs + Quad ARM A57 CPUs |
Lists related documents and models for further information.
Defines common abbreviations used throughout the document.
Describes the Jetson TX2/TX2i module components and available interfaces.
Details the allocation of power rails within the module's power subsystem.
Illustrates main power connections, sources, and control signals on the carrier board.
Explains the critical power-up sequence involving key control signals.
Details how module power monitors indicate supply status via WARN or CRIT outputs.
Details the requirements for auto-power-on support for Jetson TX2i modules.
Details USB 2.0 and USB 3.0 pin descriptions and design guidelines.
Describes the PCIe controller, lane configurations, and design guidelines.
Details the Gen 2 SATA controller implementation and design guidelines.
Details MIPI DSI data lanes, configurations, and pin descriptions.
Describes eDP, DP, and HDMI interface capabilities and pin mapping.
Explains the standard SD socket connection and signal routing requirements.
Details the nine I2C controllers, pin descriptions, and interface mapping.
Describes the three SPI interfaces, pin descriptions, and connection diagrams.
Covers the five UARTs, pin descriptions, and typical assignments.
Explains MPIO pad behavior when associated power rail is enabled or disabled.
Details internal pull-up behavior for CZ type MPIO pads at power-on.
Identifies unused MPIO pins supporting SFIO and GPIO capabilities.
Explains the importance of trace and via characteristics for signal integrity.
Provides guidelines on via count, placement, and their impact on power distribution.
Explains the importance of stack-up definition for design.
Discusses PCB transmission line characteristics affecting signal integrity.
Describes microstrip and stripline transmission line types.
Identifies key driver characteristics for signal integrity and transmission speed.
Explains key receiver concepts for optimum signal integrity.