Nvidia JETSON TX2 User Manual

NVIDIA Jetson TX2/TX2i OEM Product Design Guide
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618 10
Note:
1. Power efficiency is higher when the input voltage is lower, such as 9V or 12V. At very low voltages (close to the 5.5V
minimum [TX2 only], the power supported by some of the supplies may be reduced).
2. These pins are handled as Open-Drain on the carrier board.
Figure 1. Power Block Diagram
Jetson TX2/TX2i
DC
Jack
A1
A2
B1
B2
C1
C2
A50
Memory/Peripherals
LPDDR4, eMMC,
Ethernet,
WiFi / BT (TX2 only)
Power Subsystem
5V/3.3V Pre-Regs
PMU Switchers/LDOs
CPU/GPU Regs
Ext. LDOs
Load Switches
Tegra
VDD_RTC
VDD_IN
B8
E2
B50
A47
A46
A48
VIN_PWR_BAD#
CARRIER_PWR_ON
RESET_IN#
RESET_OUT#
POWER_BTN#
SLEEP#
CARRIER_STBY#
CHARGER_PRSNT#
MOD_PWR_CFG_ID
B7
From Carrier Board main
power input & discharge circuit
To Carrier Board power subsystem
System Reset to/from Carrier Board
Tegra Force Reset from Carrier Board
Optional Sleep Button
To Carrier Board to disable devices/
rails to be off in sleep mode
SLEEP
Optional Power Button
POWER
Super Cap
or Li Cell
(Optional)
A49
Optional signal from Carrier Board
to support Auto-Power-On
PU
PU
PU
Auto-power-
on Circuit
PU
ACOK
PU
PU
PU
PU
B49
Jetson TX2
Jetson TX2i
To Carrier Board Power-on circuitry
(B49 on Jetson TX2 is RSVD – No Connect)
3.1 Supply Allocation
Table 6 Internal Power Subsystem Allocation
Power Rails
Usage
(V)
Power Supply
Source
VDD_5V0_SYS
Supplies various switchers & load switches that power
the various circuits & peripherals on the module
5.0
5V DC-DC
VDD_IN
VDD_CPU
Tegra MCPU/BCPU
1.0 (Var)
OpenVREG (uP1666QQKF)
VDD_5V0_SYS
VDD_GPU & VDD_SRAM
Tegra GPU & SRAM
1.0 (Var)
OpenVREG (uP1666QQKF)
VDD_5V0_SYS
VDD_SOC (CORE)
Tegra Core
1.0 (Var)
OpenVREG (uP1666QQKF)
VDD_5V0_SYS
VDD_DDR_1V1_PMIC
LPDDR4
1.125
PMIC Switcher SD0
VDD_5V0_SYS
AVDD_DSI_CSI_1V2
Source for some DSI/CSI blocks
1.2
PMIC Switcher SD1
VDD_5V0_SYS
VDD_1V8
Tegra, eMMC, WLAN
1.8
PMIC Switcher SD2
VDD_5V0_SYS
VDD_3V3_SYS
Supplies various LDOs & load switches that in turn
power the various circuits & peripherals on the module
3.3
PMIC Switcher SD3
VDD_5V0_SYS
VDDIO_3V3_AOHV
Tegra VDDIO_AO_HV rail
3.3
PMIC LDO 2
VDD_5V0_SYS
VDDIO_SDMMC1_AP
Tegra SD Card I/O rail
1.8/3.3
PMIC LDO 3
VDD_5V0_SYS
VDD_RTC (See note)
Tegra Real Time Clock/Always-on Rail
1.0 (Var)
PMIC LDO 4
VDD_1V8
VDDIO_SDMMC3_AP
Tegra SDIO rail
1.8/3.3
PMIC LDO 5
VDD_5V0_SYS
VDD_HDMI_1V05
Tegra HDMI / DP rail
1.0
PMIC LDO 7
AVDD_DSI_CSI_1V2
VDD_PEX_1V05
Tegra PCIe / USB 3.0 / SATA rail
1.0
PMIC LDO 8
AVDD_DSI_CSI_1V2
VDD_1V8_AP (&
VDD_1V8_AP_PLL)
Main 1.8V Tegra rail
1.8
Load Switch
VDD_1V8
Note:
This is the Tegra supply, and should not be confused with the module VDD_RTC pin which is the supply that connects to the
PMIC BBATT pin to keep the Real-Time Clock powered.

Nvidia JETSON TX2 Specifications

General

Brand	Nvidia
Model	JETSON TX2
Category	Microcontrollers
Language	English