Nvidia JETSON TX2 User Manual

NVIDIA Jetson TX2/TX2i OEM Product Design Guide
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618 41
7.2 eDP / DP / HDMI
Jetson TX2/TX2i includes tw o interfaces (DP0 & DP1). Both support eDP / DP or HDMI. See Jetson TX2/TX2i Data Sheet for
the maximum resolution supported.
Table 38. HDMI / eDP / DP Pin Descriptions
Pin #
Module Pin Name
Tegra Signal
Usage/Description
Usage on the Carrier
Board
Direction
Pin Type
B34
DP0_AUX_CH
DP_AUX_CH0_N
Display Port 0 Aux or HDMI DDC SDA
Display Connector
Bidir
AC-Coupled on Carrier
Board (eDP/DP) or Open-
Drain, 1.8V (3.3V tolerant -
DDC/I2C)
B35
DP0_AUX_CH+
DP_AUX_CH0_P
Display Port 0 Aux+ or HDMI DDC SCL
Bidir
H38
DP0_TX0
HDMI_DP0_TXDN2
DisplayPort 0 Lane 0 or HDMI Lane 2
Output
AC-Coupled on carrier
board
H39
DP0_TX0+
HDMI_DP0_TXDP2
DisplayPort 0 Lane 0+ or HDMI Lane 2+
Output
F37
DP0_TX1
HDMI_DP0_TXDN1
DisplayPort 0 Lane 1 or HDMI Lane 1
Output
F38
DP0_TX1+
HDMI_DP0_TXDP1
DisplayPort 0 Lane 1+or HDMI Lane 1+
Output
G36
DP0_TX2
HDMI_DP0_TXDN0
DisplayPort 0 Lane 2 or HDMI Lane 0
Output
G37
DP0_TX2+
HDMI_DP0_TXDP0
DisplayPort 0 Lane 2+ or HDMI Lane 0+
Output
H35
DP0_TX3
HDMI_DP0_TXDN3
DisplayPort 0 Lane 3 or HDMI Clk Lane
Output
H36
DP0_TX3+
HDMI_DP0_TXDP3
DisplayPort 0 Lane 3+ or HDMI Clk Lane+
Output
B36
DP0_HPD
DP_AUX_CH0_HPD
Display Port 0 Hot Plug Detect
Input
CMOS  1.8V
A34
DP1_AUX_CH
DP_AUX_CH1_N
Display Port 1 Aux or HDMI DDC SDA
HDMI Type A Conn.
Bidir
AC-Coupled on Carrier
Board (eDP/DP) or Open-
Drain, 1.8V (3.3V tolerant -
DDC/I2C)
A35
DP1_AUX_CH+
DP_AUX_CH1_P
Display Port 1 Aux+ or HDMI DDC SCL
Bidir
E38
DP1_TX0
HDMI_DP1_TXDN2
DisplayPort 1 Lane 0 or HDMI Lane 2
Output
AC-Coupled on carrier
board
E39
DP1_TX0+
HDMI_DP1_TXDP2
DisplayPort 1 Lane 0+ or HDMI Lane 2+
Output
C37
DP1_TX1
HDMI_DP1_TXDN1
DisplayPort 1 Lane 1 or HDMI Lane 1
Output
C38
DP1_TX1+
HDMI_DP1_TXDP1
DisplayPort 1 Lane 1+ or HDMI Lane 1+
Output
D36
DP1_TX2
HDMI_DP1_TXDN0
DisplayPort 1 Lane 2 or HDMI Lane 0
Output
D37
DP1_TX2+
HDMI_DP1_TXDP0
DisplayPort 1 Lane 2+ or HDMI Lane 0+
Output
E35
DP1_TX3
HDMI_DP1_TXDN3
DisplayPort 1 Lane 3 or HDMI Clk Lane
Output
E36
DP1_TX3+
HDMI_DP1_TXDP3
DisplayPort 1 Lane 3+ or HDMI Clk Lane+
Output
A33
DP1_HPD
DP_AUX_CH1_HPD
Display Port 1 Hot Plug Detect
Input
CMOS  1.8V
B33
HDMI_CEC
HDMI_CEC
HDMI CEC
Bidir
Open Drain, 3.3V
Note:

HDMI_DP0 or HDMI_DP1. The interface must include only signals from one or the other (not mixed).
Table 39. DP/HDMI Pin Mapping
Module Pin Name
Module Pin #s
Tegra Pin Name
Tegra Pin #s
HDMI
DP
DP0
DP0_TX0+
H39
HDMI_DP0_TXDP2
E4
TX2+
TX0+
DP0_TX0–
H38
HDMI_DP0_TXDN2
E5
TX2–
TX0–
DP0_TX1+
F38
HDMI_DP0_TXDP1
C3
TX1+
TX1+
DP0_TX1–
F37
HDMI_DP0_TXDN1
B3
TX1–
TX1–
DP0_TX2+
G37
HDMI_DP0_TXDP0
A3
TX0+
TX2+
DP0_TX2–
G36
HDMI_DP0_TXDN0
B4
TX0–
TX2–
DP0_TX3+
H36
HDMI_DP0_TXDP3
C1
TXC+
TX3+
DP0_TX3–
H35
HDMI_DP0_TXDN3
C2
TXC–
TX3–
DP1
DP1_TX0+
E39
HDMI_DP1_TXDP2
A5
TX2+
TX0+
DP1_TX0–
E38
HDMI_DP1_TXDN2
A6
TX2–
TX0–
DP1_TX1+
C38
HDMI_DP1_TXDP1
C5
TX1+
TX1+
DP1_TX1–
C37
HDMI_DP1_TXDN1
B5
TX1–
TX1–
DP1_TX2+
D37
HDMI_DP1_TXDP0
D5
TX0+
TX2+
DP1_TX2–
D36
HDMI_DP1_TXDN0
D6
TX0–
TX2–
DP1_TX3+
E36
HDMI_DP1_TXDP3
C6
TXC+
TX3+
DP1_TX3–
E35
HDMI_DP1_TXDN3
B6
TXC–
TX3–

Nvidia JETSON TX2 Specifications

General

Brand	Nvidia
Model	JETSON TX2
Category	Microcontrollers
Language	English