Safety Manual for MPC5777M, Rev. 1.1
Functional safety requirements for application software
NXP Semiconductors42
Table 1. Effects of reset
Receiving module Software control Detection Software action required?
Peripheral core_2 ME_CCTL[0] non safety related NO
Main core_0 (Safety Core) ME_CCTL[1] RCCU NO
Main core_0s (Checker Core) ME_CCTL[2] RCCU NO
Main core_1 (Computational Core) ME_CCTL[3] non safety related NO
HSM ME_CCTL[4] non safety related NO
dspi_0 RGM_PRST[99] DSPI module is enabled after reset (MDISrst=0) but is kept in
HALT state (HALTrst=1, stop transfers). Cfg after reset is a
valid one. DSPI Transfer Count Register (DSPIx_TCR) is reset
to zero.
NO, after reset no message will be
sent/received
dspi_1 RGM_PRST[98]
dspi_2 RGM_PRST[227]
dspi_3 RGM_PRST[226]
dspi_4 RGM_PRST[97]
dspi_5 RGM_PRST[225]
dspi_6 RGM_PRST[96]
dspi_12 RGM_PRST[93]
iic_0 RGM_PRST[101] module disable MDISrst=1. When high, the interface is held in
reset, but registers can still be accessed.
IIC is kept under reset and no message will be sent/received
NO, after reset no message will be
sent/received
iic_1 RGM_PRST[229]
pit_rti_0 RGM_PRST[30] module disable MDISrst=1.
No clock for PIT timers hence no interrupt nor DMA transfer
request is generated. Detection depends on how the module
is used by application software
YES, application dependent
pit_rti_1 RGM_PRST[31]
linflex_0 RGM_PRST[92] no enable bit and after reset the LIN controller is in NORMAL
state (not INIT: To enter this mode software sets the INIT bit in
the LINCR1. To exit the initialization mode software should
reset the INIT bit. When in initialization mode, all message
transfers to and from the LIN bus are stopped and the status
of LIN bus output LINTX is recessive). However, LIN baud rate
after reset is set to zero (LINIBRRrst=0, LIN clock disabled)
and is simple to check.
NO, after reset no message will be
sent/received
linflex_1 RGM_PRST[91]
linflex_2 RGM_PRST[220]
linflex_14 RGM_PRST[85]
linflex_15 RGM_PRST[213]
linflex_16 RGM_PRST[84]
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