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NXP Semiconductors MPC5777M Safety Manual
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Safety Manual f
or MPC5777M, Rev
. 1.1
NXP Semiconductors
93
8
Document re
vision
history
T
able
23
summarizes revisions to this document.
T
able
23. Re
vision his
tory
Revision
Da
te
Description of changes
1
15 Jan 2015
Initia
l release.
1.1
10 Apr 2017
Conv
er
ted the do
cument to use NXP branding.
92
94
Table of Contents
Default Chapter
2
Table of Contents
2
1 Preface
3
2 General Information
4
Mission Profile
4
Functional Safety - ISO 26262 Compliance
4
Safety Goals
5
Safe State
5
Correct Operation
6
Failure Indication Signaling
6
Failure Indication Time
7
Minimum Failure Indication Time
7
Failure Handling
8
3 Functional Safety Requirements for Application Software
9
Disabled Modes of Operation
9
Debug Mode
9
Test Mode
10
Initial Checks and Configurations
10
I/O Ball Configuration
10
MCU Configuration
11
Mode Entry (MC_ME)
12
Start-Up Configuration Check
13
Dual Core Lockstep Mode
13
FCCU Fault Reaction Configuration
13
Reset Generation Module (MC_RGM)
15
Self-Test Completion
17
MEMU Initial Checks
20
Flash Memory Configuration and Tests
20
Voltage Monitor Configuration
21
Temperature Monitoring Configuration
23
Clock Monitoring Configuration
24
System Clock Availability
25
Clock Generation Module (MC_CGM)
25
PLL Generated Clocking
26
XBAR Configuration
26
Platform Flash Memory Controller
26
Wake-Up Unit (WKPU) / External NMI
27
Cache
27
Software Watchdog Timer (SWT)
27
Analog to Digital Converters
28
Temperature Sensor (TSENS)
30
Runtime Checks
30
General Requirements
30
CRC of Configuration Registers
31
XBAR Usage
32
System Memory Protection Unit (SMPU)
32
Platform Flash Memory Controller
33
Flash Memory
33
PRAMC Configuration
35
Ram
36
ECC Bypass Using Core Registers and Indirect
38
Decorated Storage Memory Controller (DSMC)
39
Interrupt Management
39
Edma Usage
40
Reset Generation Module (MC_RGM)
40
Detection of Unwanted Resets
41
Periodic Interrupt Timer (PIT)
47
System Timer Module (STM) Usage
47
I/O and Peripheral Bridge
47
System Integration Unit Lite (SIUL2)
50
GTM Wrapper
50
External Bus Interface (EBI)
50
Reading Analog Inputs
51
Software Watchdog Timer (SWT) Usage
51
Communication Peripherals
51
Temperature Sensor (TSENS)
52
Analog to Digital Converters
52
Mode Entry (MC_ME)
55
Semaphores (SEMA42)
55
Operational Interference Protection
55
Core Memory Protection Unit (CMPU)
55
System Memory Protection Unit (SMPU)
56
AIPS Protection Mechanism
56
Register Protection (REG_PROT)
57
Performance (Core_1) and Peripheral (Core_2)
57
4 Functions of External Devices for ASIL D Applications
58
External Reset Output
58
High Impedance Outputs
58
External Watchdog (EXWD)
59
Power Supply
59
Error out Monitor (ERRM)
60
Both FCCU Pins Connected to External Device
61
Single FCCU Pin Connected to External Device
61
5 Address Decoding Coverage
63
Overview
63
Test Implementation
63
Obtaining the List of Locations to be Read
69
Memories Including Block Address Decoding75
75
Test Result
79
Multiple Single Bit Error in the same Word-Line79
79
6 Testing All-X in RAM
81
Candidate Address for Testing All-X Issue
81
ECC Checkbit/Syndrome Coding Scheme
86
7 Further Information
91
Conventions and Terminology
91
Acronyms and Abbreviations
91
8 Document Revision History
93
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NXP Semiconductors MPC5777M Specifications
General
Brand
NXP Semiconductors
Model
MPC5777M
Category
Microcontrollers
Language
English
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