Safety Manual for MPC5777M, Rev. 1.1
Address decoding coverage
NXP Semiconductors78
Table 18 shows the final list of locations which are required to be read in case of memory implementing
the block decoding.
1 110 010 101 Block combination
1 110 010
21 9 6 15 18 3 12 24 110 Complementary address
1 110 010
111 Block combination
1 110 011
001 DecA combination
1 110 100
001 DecA combination
1 110 101
001 DecA combination
1 110 110
001 DecA combination
1 110 111
001 DecA combination
1 111 010
001 DecB combination
Table 18. Final list of locations which shall be read including the order in case of memory with block
decoding
DecE
DecC DecB DecA 000 001 010 011 100 101 110 111 Block Description
0 001 101
19 7 4 13 16 1 10 22 001 Complementary address
0 110 010
001 DecC combination
1 000 010
001 DecB combination
1 001 010
001 DecB combination
1 010 010
001 DecB combination
1 011 010
001 DecB combination
1 100 010
001 DecB combination
1 101 010
001 DecB combination
1 110 000
001 DecA combination
1 110 010
001 DecA combination
1 110 010
000 Block combination
1 110 010
20 8 5 14 17 2 11 23 001 Ah : victim address (red cell)
1 110 010
010 Block combination
1 110 010
011 Block combination
1 110 010
100 Block combination
1 110 010
101 Block combination
1 110 010
21 9 6 15 18 3 12 24 110 Complementary address
1 110 010
111 Block combination
Table 17. Reading same word-line, but different blocks (continued)
DecE
DecC DecB DecA 000 001 010 011 100 101 110 111 Block Description