Configuration – Daughter card
S32R274/372 EVB User Guide, Rev. 0, 08/2018
NXP Semiconductors 17
4.1.2.
Daughter card standalone power input
A terminal power input is provided on the daughter card to enable use of the daughter card without the
motherboard.
The connections of the power terminal are detailed in the figure below.
Figure 14. Terminal power input connections
NOTE
The power terminal does not connect to the 5.0V_LR power rail which is
powered by the 5V linear regulator when used with the motherboard. This
rail is powering the VDD_HV_DAC (DAC supply), VDD_HV_RAW
(AFE supply) and VDD_HV_ADCREFxx (ADC reference voltage).
When using the daughter card standalone (without the motherboard) it is
required to connect the 5.0V_LR and the 5.0V_SR rail in order for the
microcontroller to come out of reset. Refer to section 4.11 for more
information.
4.2. Reset circuit
To enable standalone use the reset circuitry is placed on the daughter card. It consist of a reset switch
that is connected to RESET_B via a jumper, and an external voltage monitoring IC connected to
VREG_POR_B. The RESET_B signal is also connected to the signal RST-SW that is connected to the
mother board to reset peripherals. A yellow LED (D2) is used to indicated RESET_B reset situations,
and a red LED (D9) indicates VREG_POR_B reset situations.
The EVB reset circuit provides the following functionality:
The reset switch SW2 can be used to reset the MCU. The reset switch signal is connect to the MCU
reset signals RESET_B (through jumper J47) and the connection can be released by lifting the according
jumper. For normal operation leave jumper J47 populated. If external control of RESET_B is required
then connection of a control signal to pin 2 of J47 can be made. Pushing the reset switch will also reset
peripherals that are connected to the board reset signal signal RST-SW.
Since the S32R274 device offers both internal and external regulation modes this is configurable on the
daughtercard, and thus an external voltage monitoring IC (U18 – Linear Devices LTC2905) is utilised to
protect the device when in external regulation mode and the device low voltage detect (LVD)
mechanism is disabled. This circuit monitors the 1.25 V (core supply) and 3.3 V IO supply domain and
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