7
2-1-1 CPU Unit Components
The following diagram shows the basic components of the CPU Unit that are
used in general operation of the PC.
Lock the CPU Unit to
the adjacent Unit.
Indicators
RS-232C Port (except CQM1-CPU11-E)
Used for communications with external devices or other PCs.
Peripheral Port
Used to connect to Peripheral Units such as a Program-
ming Console, Data Access Console, or a computer
running LSS/SSS.
DIP switch
Battery
Memory
cassette
(optional)
Pulse I/O connectors (CQM1-CPU43-EV1 only);
ABS interface connectors (CQM1-CPU44-EV1 only)
Analog setting controls
(CQM1-CPU42-EV1 only)
2-1-2 DIP Switch
The DIP switch is located under a cover on the front of the CPU Unit as shown in
2-1-1 CPU Unit Components. The setting of these switches is described in the
following table.
Pin Setting Function
1
ON Program Memory and read-only DM (DM 6144 to DM 6655) data
cannot be overwritten from a Peripheral Device.
OFF Program Memory and read-only DM (DM 6144 to DM 6655) data
can be overwritten from a Peripheral Device.
2
ON Auto-boot enabled. The contents of Memory Cassette will be
transferred to the CPU Unit automatically at start-up.
OFF Auto-boot disabled.
3
ON Programming Console messages will be displayed in English.
OFF Programming Console messages will be displayed in the lan-
guage stored in system ROM. (Messages will be displayed in
Japanese with the Japanese version of system ROM.)
4
ON Expansion instructions set by user. Normally ON when using a
host computer for programming/monitoring.
OFF Expansion instructions set to defaults.
5
ON RS-232C communications governed by default settings.
(1 start bit, even parity, 7-bit data, 2 stop bit, 9,600 bps) (See note
2.)
OFF RS-232C communications not governed by default settings.
6
ON
The setting of pin 6 determines the ON/OFF status of AR 0712. If
OFF
pin 6 is ON, AR 0712 will be ON and if pin 6 is OFF, AR 0712 will
be OFF. (See note 3.)
Note 1. All DIP switch pins except pin 3 are turned OFF at the factory.
2. The above settings apply to CPU Units manufactured from July 1995 (lot
number jj75 for July 1995). For CPU Units manufactured before July
1995 (lot number jj65 for June 1995), only 1 stop bit will be set and the
baud rate will be 2,400 bps.
3. Pin 6 can be used to control the status of AR 0712 in memory to provide
optional control of program execution.
CPU Unit Section 2-1
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