Panasonic SA-PT480PH

118
I
K
L
J
M
O
P
N
29 30 31 32 33 34 35 36 37 38 39 40 41 42
A
MAIN(DV5U) CIRCUIT
SCHEMATIC DIAGRAM - 6
SA-PT480PH MAIN(DV5U) CIRCUIT
2/6 3/6
5/6
1/6
4/6 6/6
TO MAIN(DV5U)
SECTION (5/6)
TO MAIN(DV5U)
SECTION (3/6)
P1
FOR SOFTWARE
TO TRAVERSE / SPINDLE
: OPTICAL/HDMI AUDIO INPUT SIGNAL LINE: CD/DVD AUDIO INPUT SIGNAL LINE
: CD/DVD VIDEO INPUT SIGNAL LINE
: AUDIO OUTPUT SIGNAL LINE : VIDEO OUTPUT SIGNAL LINE: +B SIGNAL LINE
I
TO
USB CIRCUIT
(CN6401)
IN SCHEMATIC
DIAGRAM - 22
: USB SIGNAL LINE
3
1
2
4
5
IC8701
INVERTER
VOLTAGE REGULATOR
C0JBAB000907
H0J270500131
X8621
C8622
8P
C8621
8P
C8010
220P
231
JK8001
DIGITAL AUDIO
IN OPTICAL
C8002
6.3V33
R8621
1M
R8622
1K
R8263 R8261
82K 82K
C8255
16V22
4
5
1
3
2
7
6
FP8251
LB8255
0
C8260
220P
R8251
6.8
16V47C8257
C8258 0.1
C8264
0.1
C8364
0.1
MGND
C8256
0.1
0.1
C8262
2
1
27
5
24
25
22
17
19
18
15
16
3029
20
21
7
11
10
13
14
12
8
9
23
6
3
4
26
28
IC8251
C0GBG0000048
MOTOR DRIVER
0
R9099
10K
R8252
LDCNT
FODRV
0.1
C8261
TRDRV
R8264R8262
15K15K
SPMUTE
K8252
0
K8251
G1C100M00049
L8251
0
0
L8250
C8252
0.1
4.7
C8151
LB8701
R8702
10
C8701
0.1
D+5V_USB
C8111
10
D+3R3V
C8112
1
C8118
0.015
T1
4756132
IC8111
C0DBFZG00001
0.015
C8113
NSW1R2V
TRVFTMUTE
D+3R3V
C8023
0.1
R8601 100K
0
R8602
4
21
3
RX8032
D1H447220001
0.015
C8602
VHALF
R8025
0
IECINPUT
L8001
G1C100M00049
R8232 R8231 R8230
7.5K 7.5K 2.2K
C8232
0.1
C8231
0.1
100
R8611
SDATA
EXTRGO
NRST_2
NRST_1
I2C_SDA
SCLOCK
6
8
9
7
2
1
4
5
3
10
FP8031
C8611
0.1
42
13
RX8611
D1H447220001
6
7
5
2
4
3
81
REPX0860H
EEPROM
IC8611
100
R8613
I2C_SCL
MUTE3
LDCNT
FIN
VO3-
M+9V
VO3+
VO4+
VO4-
MUTE4
TRIN
VIN3
LDIN
BIAS2
PREVCC
VCC
GND
LDIN
TR-
SP-
SP+
TR+
OPEN_SW
INNER_SW
DGND
AD1
D+5V
OPIN-
OPIN+
VO2-
VO2-
VO1+
VO1+
VO2+
VO2+
VO1-
VO1-
FIN
OPOUT
GND
MUTE12
VCC
BIAS1
VIN2
VIN1
OPIN-
OPIN+
GND[PRE]
DGND
INNER_SW
UNLOAD_SW
D+3R3V
GND VCC OPT-IN
INA
VCCNC
VDD33
SDA GND
A0VCC
SCL A2
WP A1
VDD33
EXT_CAP 1.2V D+3.3V
RST_O
VCC
GND
GND
VCC
LB8702
J0JCC0000308
J0JCC0000308
OSC27M
OSCO
OSCI
DGND
VDD
VDD
SCLOCK
NRESET
DGND
DGND
KMODE
SDATA
EXTRG0
DRV1
DRV0
OUT
GND
HD: MAIN(HDMI): SCHEMATIC DIAGRAM - 7
MA: MAIN(MICON): SCHEMATIC DIAGRAM - 8 ~ 13
DV: MAIN(DV5U): SCHEMATIC DIAGRAM - 1 ~ 6
C8251
6.3V220
FP9001
0
LB9002
0
LB9003
R9001 0
R9002 0
D+
VBUS_OUT
D-
4
3
5
1
2
D+
D-
VBUS
DGND
DGND
VBUS_OUT
VBUS_EN
3
1
2
4
5
C9008C9006
220P0.1
OC
OUTIN
GND
EN
HIGH SIDE SWITCH
IC9006
C0DBZYY00311
USB_OVER
10K
R9036
C9007
0.1
1
25
6
34
C9009
10P
LB9001
J0JCC0000042
LB9004
J0JCC0000308
R9010
10
2Y 2A
1A1Y
VC GND
P5
X9004
H1A4805B0038
R9008 1M
IC9003
C0JBAB000908
INVERTER
R9009
1K
10P
C9004
C9005
12P
32
14
C9001
0.1