Panasonic TH-65PF12EK - Portrait Mode Setup; Portrait Mode Configuration

TH-65PF12EK
44
11.2. Block (1 of 6) Diagram
TMDS_RX1-
DVI_CN_SDA
TMDS_RX2-
AUDIO_L
TMDS_RXC+
AUDIO_R
TMDS_RX2+
DVI_CN_SCL
TMDS_RX1+
AUDIO_R
AUDIO_L
TMDS_RX0+
TMDS_RXC-
TMDS_RX0-
JK3301
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
D3011
+5V
JK3302
Q3305
D3025
+3.3V
Q3304
+5V
Q3301
PA3301
X3302
+15V
XIN
B0-B7
VCC(+3.3V)
LVDS_TX1-
IC3342
DVI IN
5V<->3.3V
TB2+
TD1-
USE
N.C.
CLK7(27MHz)
EVEN_G0-G7
A26
DS12
TA2-
TC2-
FREQ1
LVDS_TX5+
USE
B14
GENX_CONTROL_IIC
TCK1-
+9V
B23
TMDS_G
TC1-
AND
TA1
-TE1
LVDS_TX6-
SLOT_IIC
LVDS_TX3-
VCC(+3.3V)
OE2
B19
A8TMDS_G
N.C.
TMDS_D0-
TVLOAD_IIC
+1.2V
VCC
TE1-
IC3310
LVDS_TX4-
A3
ODD_B0-B7
A5
TB1-
TMDS_G
CONFIG ROM
A9
IC3303
LVDS_TX2-
+1.8V
TMDS RX0
-RX2
IIC CLOCK2
WR
EEPROM
TCK1+
DVI_5V_DET
IC3320
RGB
OUTPUT
EVEN_R0-R7
FACTORY
10MHz
B0-B7
STB+5V
VCC
B11
R1PWR5V
+3.3V
USE
NRST
Q3303
RESET
N.C.
LVDS_TXC-
H4
DVI I/F RECEIVER
TC2+
S2
TD1+
NRST
CSDA/CSCL
H,V,CK
IC3308
B6
TD2+
G0-G7
TA1-
B5
A
R
IC3301
TCK1
LVDS_TX6+
B0-B7
LATCH
SDA1
SCL1
STB+5V
IC3314
VCC
FOR
IC3307
B38
TE2+
SCL
G0-G7
SDA
TE2-
EEPROM
VCC(+3.3V)
B2
VCC(+3.3V)
H2
FACTORY
VCC
N.C.
DATA
ASD
DCLK
EVEN_B0-B7
B24
LVDS_TX7+
+5V
B0-B7
R0-R7
TMDS_C+
LVDS_TX9-
IC3346
H,V,CLK
5V<->3.3V
LVDS_TX2+N.C.
VCC(+1.2V)
TA1+
LVDS_TX3+
LVDS_TX8+
+15V
IIC DATA2
B37
A22
A10
DSCL1/DSA1
+15V
TMDS_G
IC3312
VOUT
GND
SDA2
SCL2
TB1+
1
S1
VCC
N_FHD
N.C.
DVI_CN_SDA/SCL
DDCD
HPD
LVDS_TX0-
SDA/
SCL
TMDS_D2+
DDCC
VCC(+1.8V)
L
H,V,CK
R0-R7
A
TMDS_D2-
H1
A19 +5V
HD/FHD DET
TMDS_D1+
AUDIO OUT L
A23
SDA/SCL
PLUG DET
FACTORY
IC3343
O_CLK
R0-R7
B
FOR
A7
A21
VCC(+3.3V)
CKOUT
B39
IC3319
XTAL IN
TC1+
+9V
B12
B8
TB2-
LVDS_TX5-
RESET
TMDS
DECODER
A14
A15
B25
FOR
AUDIO OUT R
X3301
TD2-
SLOT_IIC
LVDS_TX7-
OSCXI
A12
IC3345
B21
Q3302
G0-G7
2
WC
+9V
ODD_G0-G7
3
A13
FPGA
HDE
TMDS_D0+
VCC
4
+5V
G0-G7
SYNCHRONIZATION
FREQ0
GENX MPU
TMDS_D1-
AUDIO IN
A4
HSYNC,VSYNC,DOCK
SDA/SCL
DATA RECOVERY
SDA0
SCL0
CLOCK CONTROL
LVDS_TX1+
IC3341
LVDS_TX4+
H3
ODD_R0-R7
HPS
CLK4
TA2
-TE2
PLL
B9
LVDS CONVERTER
EPCS_DATA
EPCS_ASD
EPCD_DCLK
TMDS_C-
IIC CONTROL(SRQ)
B15
LVDS_TX0+
LVDS_TX8-
DVI_IIC
LVDS_TXC+
TA2+
RESET
A2
B
DVI-D INTERFACE
OSCXO
B3
LVDS_TX9+
EDID_WP
DVI_5V_DET
TE1+
R0-R7
A28