PEP Modular Computers VMP2 - Page 35

VMP2 Functional Description
ID 24855, Rev. 02 Page 2 - 7© 2002 PEP Modular Computers GmbH
PCI agent mode capability
• Address translation unit
• Internal configuration registers accessible from PCI
• Two-channel integrated DMA controller
• Supports direct mode or chaining mode (automatic linking of DMA transfers)
• Supports scatter gathering - read or write discontinuous memory
• Interrupt on completed segment, chain, and error
• Local-to-local memory
• PCI-to-PCI memory
• PCI-to-local memory
• Local-to-PCI memory
Message unit
• I2O message controller
• Two door-bell registers
• In-bound and out-bound messaging registers
I2C controller with full master/slave support
Embedded programmable interrupt controller (EPIC)
• Five hardware interrupts (IRQs) or 16 serial interrupts
• Four programmable timers
Integrated PCI bus and SDRAM clock generation
Programmable memory and PCI bus output drivers
Debug features
• Watchpoint monitor
• Address attribute and PCI attribute signals
• JTAG/COP - common onboard processor for in-circuit hardware debugging
• Performance monitor
603e core
High performance, superscalar 603e core
627 Dhrystone (2.1) MIPS
Integer unit (IU), floating point unit (FPU) (user enabled or disabled), load/store unit
(LSU), system register unit (SRU), and a branch processing unit (BPU)
16 kB instruction cache
16 kB data cache
Lockable L1 cache - entire cache or on a per-way basis
Dynamic power management
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