RCA 70/46 - Instruction Format

REPRESENT ATION
OF NUMBERS
INSTRUCTION
FORMAT
55 Format
Description
Decimal Arithmetic
Instructions
• Decimal operands in packed format are four-bit, binary-coded, decimal
digits packed two to a byte. The
operands may be variable in length and
must contain a sign in the rightmost four bits of the rightmost byte.
The digit and sign codes are as follows:
Digit and Sign Codes
Digit Code
Sign
Code
0 0000
+
1010
1 0001 - 1011
2
0010
+
1100
3 0011
-
1101
4 0100
+
1110
5 0101
+
1111
6 0110
7 0111
8 1000
9 1001
EBCDIC or USASCII sign or zone codes are generated for the decimal
arithmetic results depending on the setting of the decimal code bit in the
Interrupt Status Register. When the decimal code bit is set for EBCDIC,
the following codes are generated:
Sign
Zone
Plus Minus
1100
1101 1111
When the decimal code bit is set for USASCII, the following codes are
generated:
Sign
Zone
Plus
Minus
1010 1011 0101
Note: The codes (1110) 2 and (1111) 2 are accepted as plus signs. However,
if an arithmetic operation is performed on a field with these signs,
the sign of the result will be in EBCDIC or USASCII, as shown
above.
• Decimal arithmetic instructions use the two-address, SS format as
follows:
Op Code
o
7 8 11 12 15 16 19 20 31 32 35 36 47
• The contents of the general register specified by Bl are added to the
contents of the displacement field (D
1
)
to obtain the main memory location
of the leftmost byte of the first operand. The length (L
1
)
of the first address
specifies the number of bytes that are to the right of the location obtained
above, thus giving the processor the address of the rightmost byte of the
first operand. The length of the operand can be from one to 16 bytes, since
155