Block
18
Interrupt Servicing
Input/Output
Operation
• A
test
is made to see
if
this
is a
data
chain operation.
If
it
is,
the
device
is told to
set
an
end condition on
the
next
data
service request
and
control
is
transferred
to Block 14 to complete
the
end servicing.
If
this
is a com-
mand
chain operation
(the
device
has
already indicated
an
end condition)
control is
transferred
to Block 8 where
the
device control electronics is
told to
set
an
interrupt
condition.
Notes
On
End and Chaining Servicing:
1. The following
test
occurs when
the
next
Channel Command Word
is fetched:
The
main
memory address specified is tested to see
if
it
is in
available
main
memory
for
the
system.
If
it
is not,
the
pro-
gram
check
bit
in
the
channel
status
byte is
set;
and,
if
data
chaining,
the
device is told to
set
an
end condition on
the
next
data
service request (see Block 2) ;
if
command chaining,
the
device control electronics is told to
set
a channel
interrupt
condition (see Block
8).
2.
If
a
main
memory
parity
error
occurs when fetching the
next
Channel Command Word, the channel control check
bit
in
the
chan-
nel
status
byte is
set;
and,
if
data
chaining,
the
device control
electronics is told to·
set
an
end condition on
the
next
data
service
request (see Block
2);
if
command chaining,
the
device control
electronics is told to
set
a channel
interrupt
condition (see Block
8).
3.
If
a scratch-pad memory
parity
error
occurs when
storing
the
sub-
channel
registers
back
in
non-addressable main memory
the
chan-
nel control check
bit
in
the
channel
status
byte is set.
4.
If
a scratch-pad memory
parity
error
occurs when
storing
the
sub-
channel registers back in non-addressable
main
memory,
the
chan-
nel control check bit in
the
channel
status
byte is
set;
and,
if
data
chaining,
the
device control electronics is told to
set
an
end condi-
tion on
the
next
service request (see Block 2) ;
if
command chaining,
the
device control electronics is told to
set
a channel
interrupt
condition (see Block
8).
•
Interrupt
servicing occurs when
the
appropriate
flag in
the
Interrupt
Flag
register
has
been set,
and
the
Interrupt
Mask
register
for
the
current
state
permits
the
interrupt
and
it
is taken. This service is required
to:
1. Obtain the
standard
device byte
from
the
device control electronics
(if
applicable)
and
store
it
in
the
appropriate
input/output
channel registers.
2.
Fetch
the
appropriate
subchannel
registers
from
non-addressable
main
memory
if
the
interrupt
is due to a multiplexor channel device.
The subchannel
registers
are
stored in
the
multiplexor channel
registers
in scratch-pad memory.
There
are
three
kinds of channel
interrupts.
They
are
as
follows:
Programmed Control
Interrupt-This
interrupt
occurs
when
a
Channel
Command Word is fetched
and
the
program
controlled
interrupt
flag
bit
is
77
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