RCA 70/46 - Console Interrupt Request; Paging Error; Paging Queue; Supervisor Call Instruction 2 20 P a

~
01
Priority No.
18
19
20
21
Condition
Console Interrupt Request
Paging Error
Paging Queue
Supervisor Call
Table 9. Interrupt Conditions (Cont'd)
Flag Bit
217
2
18
2
19
2
ro
Explanation
This interrupt is controlled by the Console Interrupt key on the operator's console.
Any instruction being executed at the time of interrupt goes to completion.
The conditions under which this interrupt occurs are when memory is addressed in
the translation mode (T = 1) and any of the following occurs:
1. When the Non-Privileged Mode is set (N = 1), address translation is occurring
(D = 0) and the State Control Bit S in the Translation Table is reset (S = 0).
2. When a non-existent translation table element is addressed (Le., the two unused
bits of the segment field of a virtual address are not zero) and address translation
is occurring (D = 0).
3. When a 2,048-byte page error occurs; i.e., direct address bit is reset (D = 0), the
page control bit in the Translation word is set (M = 1) and the high-order bit
of the Displacement field of the address is set (1).
4. When the Non-Privileged mode is set (N = 1) and the direct address bit in the
virtual address is set (D = 1).
5. An operation to write into a location within a page which cannot be written to
(Le., Control Bit E = 1 and D = 0).
Note: These interrupts cause termination of the instruction with unpredictable
results.
Translation Table Location contains an element with control bit U = 0 (i.e., page
cannot be used) and memory is addressed via address translation (D = 0 and T = 1).
This interrupt causes the instruction to be suppressed.
Note: This interrupt may occur on instruction staticizing or operand fetching. The
interrupt occurs such that the instruction is suppressed. If the interrupt
occurs on the first halfword of the instruction being staticized, the NIA field
of the object P counter is altered to address the second halfword, and the
ILC field is set to 01) by the equipment. If the interrupt occurs on sub-
sequent halfwords, the NIA field is adjusted to the next halfword and the ILC
incremented by one for each halfword automatically by the equipment. This
enables the object instruction to be re-staticized and executed after the
applicable pages have been called into memory. A Special Function is
provided to facilitate backing-up of the P counter with the use of the ILC
and identification of these pages which may not be utilized.
This interrupt results from the execution of the Supervisor Call instruction. The P
counter and the Interrupt Status register of the interrupted state are updated nor-
mally. The rightmost eight bits of the Interrupt Status register of the state in which
the instruction is executed receives the R
1
,
~ field of the Supervisor Call instruction.
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