Channel
Status Byte
(Cont'd)
Standard Device Byte
Input/OutPut Operation
4. Invalid Key. The memory protection key in
the
Channel Address
Word is
not
zero
and
the
system does not have
the
Memory
Protect
option installed.
Notes:
1.
If
a
program
check
error
occurs
during
input/output
initiation,
the
operation is suppressed
and
the
program
is notified
of
the
error
by
the
condition
error
setting.
2.
If
a
program
check
error
occurs while the
input/output
operation
is
in
progress,
the
operation
is
terminated
and
a channel
interrupt
occurs
for
the specified channel.
3.
If
a
program
check
error
occurs
during
chaining (command
or
data),
a channel
interrupt
occurs
for
the
specified channel
and
chaining is suppressed.
Bit
Position 11 is
the
protection check bit. When set, this
bit
indicates
that
the channel
tried
to store
data
in a protected main memory area. The
operation is terminated
and
a channel
interrupt
occurs
for
the specified
channel.
If
chaining (command
or
data)
is
in
progress,
it
is suppressed.
Bit
Position
12
is
the
channel
data
check bit. When set,
this
bit
indi-
cates
that
a
parity
error
was
detected in
the
channel, in main memory,
noOn-addressable
main
memory
or
in scratch-pad memory.
Characters
with
bad
parity
going into memory
are
replaced
with
the
systems
error
byte
(hexadecimal
FF),
and
the
input/output
operation is completed.
For
parity
error
characters
going to a device,
(writing)
the
invalid
character
is
transferred
unchanged, the operation is terminated
and
a channel
interrupt
occurs
for
the
specified channel. (The
transfer
of
sense byte (s) to memory
is
not
checked
for
parity.)
Bit
Position 13 is
the
channel control check bit. When set,
this
bit
indicates
that
a machine 'malfunction has occurred affecting
the
channel
controls. Conditions which cause
this
bit
to be
set
are
parity
error
in the
Channel Command Word,
data
address,
or
contents of the Channel Com-
mand
Word. The operation is terminated
and
a channel
interrupt
occurs
for
the
specified channel.
If
chaining (command
or
data)
is in progress,
it
is suppressed.
Bit
Position 14 is reserved
for
use by
the
processor.
Bit
Position
15
is the termination
interrupt
bit. When set, this
bit
indicates
that
a termination
interrupt
has
been effected.
Important: The channel
status
byte is reset only when
an
input/output
operation is initiated .
• The
standard
device byte is stored in scratch-pad memory in the
Assembly/Status
register
(bit
positions 24
through
31)
for
the
appropriate
channel. This byte indicates the
status
of
a device
after
an
input/output
operation.
It
may also indicate a device request
interrupt.
The
standard
device byte is automatically stored
when:
1.
An
input/output
interrupt
is serviced (request
or
termination).
65
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