RCA 70/46 - Interrupt Action

RX Format
Description
RR Format
Description
INTERRUPT ACTION
Address Error
Addressing
Specification
Branching Instructions
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7 8 11 12 15 16 19 20 31
• The contents of the general registers specified by X
2
and B2 are added
to the contents of the D2 field to obtain the branch address (second
operand). The Rl field specifies the general register which contains the first
operand.
In a Branch on Condition instruction, the M field is a mask
which specifies the condition codes to be tested.
o
7 8 11 12 15
• The contents of the general register specified by the R2 field are the
branch address (second operand). The Rl field specifies the general register
that contains the first operand. The same register can be specified by Rl
and R
2
. If R2 is zero, no branching occurs. In a Branch on Condition
instruction,
the M field is a mask that specifies the condition codes to
be tested.
Notes:
1. A zero in the X
2
or B2 field indicates that the corresponding address
component is absent.
2. The sequence
of operations when using general registers is as follows:
a. compute
the address.
b.
store arithmetic or link information.
c. replace the P counter with the branch address.
• Interrupts can occur as a result of an Execute instruction only. The
interrupt conditions are as follows:
• An address error interrupt occurs when the branch address of an
Execute instruction is outside the main memory for the particular installa-
tion, or if an Execute instruction is attempted to perform another Execute
instruction. The operation is suppressed and the condition code, registers,
and main memory are unaltered.
• An address error interrupt occurs if the branch address of an Execute
instruction is not on a halfword boundary. The operation is suppressed
and the condition code, registers, and main memory are unaltered.
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