EasyManua.ls Logo

RCA 70/46 - Page 80

RCA 70/46
260 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Block 14
Block
15
Input/Output Operation
A
test
is made to see
if
the service request
was
honored
for
a device
on
the
multiplexor channel.
If
it
was not,
program
control continues
with
the
next
instruction
or
with
the
instruction
that
was
interrupted
due to
the
service request.
If
the
service request
was
honored
for
a device on
the
multiplexor
channel, a
test
is made to see
if
it
is a
burst
mode operation.
If
it
is
not
a
burst
mode operation,
the
sub-channel
registers
are
sent
back to non-
addressable
main
memory.
In
either
case,
program
control continues
with
the
next
instruction
or
with
the
instruction
that
was
interrupted
due to
the
service request.
Notes on Servicing a Data Transfer:
1. All
input/output
data
service requests
are
honored depending on
the
channel's position in
the
priority
sequence.
2.
The following tests occur when a
data
byte is
transferred
to main
memory:
a. The
main
memory address to which
the
data
byte is to
be
trans-
ferred
is tested to see
if
it
is in a memory protected
area
(Memory
Protect
feature
must, be installed).
If
it
is,
the
protection check
bit
in
the
channel
status
byte is
set
(no
data
transfer
occurs)
and
the
device control electronics is told to
set
an
end condition
on
the
next
data
service request (see Block
13).
b.
The
main memory address
to
which
the
data
byte is to
be
trans-
ferred
is tested to see
if
it
is in available
main
memory
for
the
system.
If
it
is not, the
program
check
bit
in
the
channel
status
byte
is
set
(no
data
transfer
occurs)
and
the
device control
electronics is told to
set
an
end condition on
the
next
data
service
request (see Block
13).
3. The following
tests
occur when a
data
byte
is
transferred
from
main
memory:
a. The
main
memory address
from
which
the
data
byte is to be
transferred
is tested to see
if
it
is in available
main
memory
for
the
system.
If
it
is not, the
program
check
bit
in
the
channel
status
byte is
set
(no
data
transfer
occurs)
and
the
device control
electronics is told
to
set
an
end condition on
the
next
data
service
request (see Block
13).
b.
The
data
byte to be
transferred
is checked
for
correct
parity.
If
parity
is
not
correct,
the
data
check
bit
in
the
channel
status
byte is
set
and the device control electronics is told to
set
an
end
condition on
the
next
data
service request (see Block
13).
4.
If
a
main
memory
parity
error
occurs while fetching the subchannel
registers,
the
channel control check
bit
in
the
channel
status
byte
is set,
and
the
device control electronics
is
told to
set
an
end condition
on
the
next
data
service request (see Block
13).
5.
If
a scratch-pad memory
parity
error
occurs
during
the
servicing
of
a
data
transfer,
the
channel control check
bit
in
the
channel
status
byte
is
set
and
the
device
control
electronics
is
told
to
set
an
end condition on
the
next
data
service request (see Block
13).
71

Table of Contents

Related product manuals