Index-1
S7-200 Programmable Controller, CPU 210
C79000-G7076-C235-01
Index
A
Absolute addressing, 4-4
AC installation, guidelines, 1-10
Access cover
location of the analog adjustment
potentiometer, 4-16
removing, 1-7
Accessing data
analog adjustment value in special memory
(SM), B-2
memory areas, 4-4
operand ranges, 4-11, 5-2
Accessing the Symbol Table, 2-13
Addressing
analog adjustment value in special memory
(SM), B-2
bit memory (M) area, 4-12
counter memory area, 4-13
input image register, 4-12
memory areas, 4-11
outputs, 4-12
special memory (SM), 4-12
timer, 4-13
using symbolic names, 2-13, 3-14
Agency approvals, A-2
Analog adjustment
addressing special memory (SM), 4-12
changing the value, 4-16
current value stored in SMW2, B-2
location of the potentiometer, 4-16
nominal range, 4-16
sample program, 4-16
And (A) instruction, 5-3
effect on the logic stack, 4-10, 5-3
And Load (ALD) instruction, 5-13
effect on the logic stack, 5-13
And Not (AN) instruction, 5-3
Area identifier with device number, accessing
timers and counters, 4-12
B
Baud rate, 2-3
bit memory.
See
special memory (SM) bits
Bit memory (M), 4-11
addressing, 4-12
Bit.byte addressing, 4-11
Boxes, represented in ladder, 4-9
C
Cables
baud rate, 2-3
order number, F-1
pin assignment, A-14
specifications (PC/PPI), A-14
Case-sensitive symbols, 2-13, 3-15
CE certification, A-3
Changing elements in the program
ladder, 2-7, 3-16–3-20
STL, 2-8, 3-15
Changing view between ladder and STL
creating networks in STL, 2-8
menu command, 2-9
Clearance requirements, 1-4
Clock, effect on scan time, E-1
Clock pulse bits, B-1
Coils, represented in ladder, 4-9, 5-5
Comments, in statement list, 4-10
Communications
baud rate, 2-3
connecting to the PDS 210, 2-3
pin assignment, A-14
point-to-point (PPI) interface, 2-3
setting up parameters, 2-4
Compare Word instructions, 5-4
Compiling
errors, rule violations, C-1
sample program, 3-21
STEP 7-Micro/WIN program, 2-8
Computer requirements, 2-1
Connector (optional), 1-10
order number, F-1
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