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Sony HBD-E280 - Page 65

Sony HBD-E280
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HBD-E280/T28
65
IC Pin Function Description
MB-141 BOARD IC101 CXD9998G-BB (BD DECODER)
Pin No. Pin Name I/O Description
A2 TXVP_0 O Transmit data (positive) output to the ethernet connector
A4 TXVN_1 I Receive data (negative) input from the ethernet connector
A5 TANA_0 - Ethernet analog test terminal
A6 to A8 RX2B to RX0B I TMDS data (negative) input from the HDMI input selector
A9 RXCKB I TMDS clock (negative) signal input from the HDMI input selector
A12 AOBCK O Bit clock (for audio output) signal output to the stream processor
A13 NS_XTALI O System clock signal output terminal (27 MHz)
A14 to
A16
CH2_M to CH0_M O TMDS data (negative) output to the HDMI ARC OUT connector
A17 CLK_M O TMDS clock (negative) signal output to the HDMI ARC OUT connector
A18 EXT_CAP - Not used
A19 VDACG_OUT O Video (Y) signal output terminal Not used
A21, A22 VDIN26, VDIN24 I/O Not used
A24 to
A27
VDIN15, VDIN13,
VDIN11, VDIN9
I/O Not used
A28 VDIN7 O Request signal output to the system controller
B3 TXVN_0 I Receive data (positive) input from the ethernet connector
B4 TXVP_1 O Transmit data (negative) output to the ethernet connector
B5 TANA_1 - Ethernet analog test terminal
B6 to B8 RX2 to RX0 I TMDS data (positive) input from the HDMI input selector
B9 RXCK I TMDS clock (positive) signal input from the HDMI input selector
B10 SCL O I2C clock signal output to the EEPROM
B12 AOLRCK O L/R sampling clock (for audio output) signal output to the stream processor
B13 NS_XTALO I System clock signal input terminal (27 MHz)
B14 to
B16
CH2_P to CH0_P O TMDS data (positive) output to the HDMI ARC OUT connector
B17 CLK_P O TMDS clock (positive) signal output to the HDMI ARC OUT connector
B18 EXT_RES - HDMI reference voltage terminal
B19 VDACB_OUT O Video (P
B) signal output terminal Not used
B21, B22 VDIN27, VDIN25 I/O Not used
B24 to
B28
VDIN16, VDIN14,
VDIN12, VDIN8,
VDIN5
I/O Not used
C1 FOIN I End detection signal input from the motor driver
C2 FOIP I Not used
C4 AVSS33_LD - Ground terminal
C5 AVDD33_COM - Power supply terminal (+3.3V)
C7, C8 VDD33_HDMI_RX - Power supply terminal (+3.3V)
C10 SDA I/O Two-way I2C data bus with the EEPROM
C11 AOSDATA0 O Serial data (for audio output) output to the stream processor
C12 AOMCLK O Master clock (for audio output) signal output to the stream processor
C14 TP_PLLG - Test terminal
C15 AVDD33_XTAL - Power supply terminal (+3.3V)
C17 AVDD33_HDMI_TX - Power supply terminal (+3.3V)
C18 VDACR_OUT O Video (P
R) signal output terminal Not used
C19 VDACX_OUT O Video (CVBS) signal output to the video ampli er
C21 VDIN31 I/O Two-way I2C data bus with the EEPROM
C22 VDIN20 O Karaoke mode information output terminal Not used
C23 VDIN18 I/O Not used
C24 CEC I/O HDMI CEC data input/output terminal Not used
C25 HDMISCK I/O Two-way I2C clock bus with the HDMI ARC OUT connector
C26, C27 VDIN10, VDIN4 I/O Not used
C28 VDIN3 O EEPROM input data selection signal output terminal
D1 FPDOCD I Laser power monitor signal input terminal Not used
D3 RSTI I Reset signal input terminal Not used
D4 AVDD33_LD - Power supply terminal (+3.3V)
D5 AVSS33_COM - Ground terminal

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