Sony SSC-DC593 - 2 Circuit Description; Main Signal Processing Circuit; Microcomputers Peripheral Circuit; CCD Drive Pulse Signal Circuit

2-1
SSC-DC593/DC593P/DC598P (E)
Section 2
Circuit Description
2-1. BI-156 Board
The output signal (at pin 8 of IC101) from a CCD imager (IC101) is passed through a buffer (consisting
of Q102 and Q101) and output from pin 12 of IC101 to the PR-269 board. H1, H2, V1, V2, V3, and V4
pulses are a CCD drive pulse supplied from the PR-269 board.
2-2. PR-269 Board
2-2-1. Main Signal Processing Circuit
The CCD-OUT signal (at pin 12 of CN201) output from the BI-156 board is input to pin 30 of IC201 for
CDS (Correlative Double Sampling). Moreover, the CCD-OUT signal is amplified using an AGC circuit.
The 10-bit data (at pins 3 to 12 of IC201) of an A/D-converted A/D output signal is input to wide
dynamic signal processing DSP (pins 1, 2, and 5 to 12 of IC203). In DSP, an exposure signal is
simultaneously processed for a long or short time and output as 10-bit data (at pins 37 to 43, and 46 to 48
of IC203). The output signal is then input to DSP CORE signal processing circuit IC204 (pins 55 to 64 of
IC204). After the input signal is digital-processed in IC204, it is converted from digital to analog so as to
produce an analog Y/C output signal (Y signal at pin 12 of IC204 and C (chroma) signal at pin 13). The
Y/C output signal is passed through filters (FL202 for Y, FL201 for C), respectively. After that, the
signal is added and output through an amplifier (consisting of IC207 and IC296) from pins 15 and 16 of
CN203.
2-2-2. Microcomputer’s Peripheral Circuit
The parameters of a digital signal processing circuit (consisting of IC203 and IC204) are set using a
microcomputer (IC304). The parameters are partially stored in E
2
PROM (IC306). The analog data
control for the peripheral circuit is performed in the form in which the digital data from a microcomputer
is passed through a D/A converter (IC301).
2-2-3. CCD Drive Pulse Signal Circuit
The CCD drive pulse signal circuit generates a CCD horizontal/vertical drive pulse and sample & hold
pulse using TG (IC202) to which a main clock of 57 MHz is input. The sync signal sent to TG is
obtained from SG in IC204.