Sony STR-DA333ES - Page 43

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Description
Ground
Serial data output
Conditional jump input terminal (7 pin: Connected to ground)
Not used (Connected to ground)
HCIF data write
HCIF data read
Ground
Power supply +3.3 V
HCIF ready signal. Open drain
HCIF chip select
HCIF address input
HCIF data input/output
Ground
Power supply +3.3 V
HCIF data input/output
Reset input "L": active
Test data output. Not used. (Not connected)
Ground
External RAM data input/output
Ground
Power supply +3.3 V
External RAM data input/output
Test data input. Not used. (Connected to ground)
Ground
Power supply +3.3 V
External RAM data input/output
Ground
External RAM data input/output
External RAM output cable
Ground
Power supply +3.3 V
External RAM column address strobe Not used. (Not connected)
External RAM write enable
External RAM raw address strobe. Not used. (Not connected)
External RAM address output/test data input
Ground
Power supply +3.3 V
External RAM data input/output
External RAM address output
Ground
External RAM address output
Not used
Test data input "L" = normal "H" = test (Connected to ground)
PLL input frequency select "L" = 256fs "H" = 128 fs (Connected to ground)
PLL output frequency select "L" = 768 fs "H" = 1024 fs (Connected to ground)
Master clock input
Master clock output (Not connected)
Pin No.
1
2 - 5
6,7
8
9
10
11
12
13
14
15
16 -20
21
22
23 - 25
26
27 -30
31
32 - 40
41
42
43 -49
50
51
52
53 -60
61
62 -69
70
71
72
73
74
75
76 -80
81
82
83 -89
90
91
92 -94
95
96
97
98
99
100
IC1112 CXD2712R (DIGITAL BOARD)
Pin Name
VSS3
SOA - SOD
ECJ0, ECJ1
—
XHDWR
XHDRD
VSS4
VDD2
HRDY
XHDCS
HA0
HD0 - HD4
VSS5
VDD3
HD5 - HD7
XRST
—
VSS6
SD0 - SD8
VSS7
VDD4
ED9 - ED15
—
VSS8
VDD5
ED16 - ED23
VSS9
ED24 - ED31
XOE
VSS10
VDD6
CAS
XWE
RAS
EA0 - EA4
VSS11
VDD7
EA5 - EA11
EA12
VSS0
EA13 - EA15
EA16
TSTA
PLDIVF
PLDIVB
CLK1
CLKO