Sony STR-DA333ES - Page 44

– 70 –
I/O
—
—
—
—
I/O
I
I
I
O
O
—
—
I
I
I
I
I
Description
Ground
Power supply +3.3 V
Ground for PLL cell
VDD for PLL cell
PLL output/test clock input (Not connected)
PLL cell oscillation enable "L" oscillation enable "H" oscillation stop (Connected to ground)
Test data input "L" = normal "H" = test (Connected to ground)
Frequency counter input (Connected to ground)
LRCK0 divider output
BCK0 divider output
Ground
Power supply +3.3 V
BCK input
BCK input
LRCK input
LRCK input
Serial data input
Pin No.
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117 -120
Pin Name
VSS1
VDD0
AVSS
AVDD
PLLCK
XPLLEN
TST
LRCT
LROUT
BKOUT
VSS2
VDD1
BCK0
BCK1
LRCK0
LRCK1
SIA - SID