Sony STR-DN1050 - Page 80

STR-DN1050
80
Pin No. Pin Name I/O Description
108 AVSS
-
Ground terminal
109 VSS
-
Ground terminal
110 VURX
I
Communication data with MAIN Micom: Receive data
111 VUTX_VU_SDA
O
Communication data with MAIN Micom: Transmit data
112 NO_USE
O
Not used
113 NO_USE
O
Not used
114 UPDATE_VURX
I
Update to MAIN Micom data input (program main micom data pin)
115 UPDATE_VUTX
O
Update to MAIN Micom data output (program main micom data pin)
116 NO_USE
O
Not used
117 NO_USE
O
Not used
118 NO_USE
O
Not used
119 HDMI_MUTE
O
HDMI: Audio Mute Request
120 NO_USE
O
Not used
121 APPLE_IIC_SCK
O
APPLE IIC Clock
122 APPLE_IIC_SDA
I/O
APPLE IIC Data
123 V_COMP_SW2
O
Component Video Select
124 PROG_VU_SCK
I
Programming Clock (video micom)
125 PROG_VUTX
I
Programming UART TX (video micom)
126 PROG_VURX
I
Programming UART RX (video micom)
127 V_SEL_SW2
O
Composite video output signal switch
128 APPLE_RST
O
APPLE IC Reset
129 VCC
-
Power supply pin (+3.3V)
130 V_SEL_SW1
O
Composite video output signal switch
131 V_MUTE
O
Video muting control signal output to the video amplifi er
132 VSS
-
Ground terminal
133 VCC
-
Power supply pin (+3.3V)
134 TRSTX (NC)
O
Test Reset (JTAG). Resets the test state machine. TRST must be asserted (pulsed low) after
power-up or held low for proper operation of the processor.
135 TCK
O
Test Clock (JTAG). Provides a clock for JTAG boundary scan. TCK must be asserted (pulsed
low) after power-up or held low for proper operation of the device. (for designer evaluation
only)
136 TDI
O
Test Data Input (JTAG). Provides serial data for the boundary scan logic (for designer
evaluation only)
137 TMS
O
Test Mode Select (JTAG). Used to control the test state machine (for designer evaluation
only)
138 TDO
O
Test Data Output (JTAG). Serial scan output of the boundary scan path (for designer evaluation
only)
139 NO_USE
O
Not used
140
TEST7
O
Test Pad 7 (for designer evaluation only)
141 TEST6
O
Test Pad 6 (for designer evaluation only)
142 TEST5
O
Test Pad 5 (for designer evaluation only)
143 TEST4
O
Test Pad 4 (for designer evaluation only)
144 TEST3
O
Test Pad 3 (for designer evaluation only)
145 TEST2
O
Test Pad 2 (for designer evaluation only)
146 TEST1
O
Test Pad 1 (for designer evaluation only)
147 UART_SEL
O
UART selector (Select video or network for back panel programming)
148 NO_USE
O
Not used
149 NO_USE
O
Not used
150 NO_USE
O
Not used
151 NO_USE
O
Not used
152 NO_USE
O
Not used
153 NO_USE
O
Not used
154 NO_USE
O
Not used
155 NO_USE
O
Not used
156 VCC
-
Power supply pin (+3.3V)
157 VSS
-
Ground terminal