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ST P-NUCLEO-WB55 User Manual
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Hardware layout a
nd configuration
UM2435
18/48
UM2435 Rev 2
Figure 10. Nucleo-68 board sch
ematics - ST
-Link/V2-1
66
ST-Link/V2-1
Title:
Size:
Reference:
Sheet:
of
A4
Revision
:
Project:
NU
CLEO-WB55.Nucle
o
MB1355
C
01-RC1
12-Jun-201
7
[No Varia
tions]
Date:
-
Variant:
USB
STLK_
N
T_SWCLK
T_SWDIO
T_NRST
AIN_1
5V_USB_STL
INK
Board
Ident:
P
C13=0
T_SWDIO_IN
LED_STLK
STLK_RX
STLK_TX
T_SWO
Red
_Green
2
1
3
4
LED6
HSMF-A201-A0
0J1/KA
A-3528SURKCGK
C
USB
_RENU
Mn
3V3_STLINK
3V3_STLINK
3V3_STLINK
3V3_STLINK
3V3_STLINK
3V3_STLINK
3V3_STLINK
3V3_STLINK
3V3_STLINK
A1
1
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
OE
10
GND
11
B8
12
B7
13
B6
14
B5
15
B4
16
B3
17
B2
18
VCCB
19
VCCA
2
B1
20
U7
TXS0108EPW
VBUS
1
DM
2
DP
3
ID
4
GND
5
Shield
6
MicroB
CN15
1050170001
R23
100K
GND
GND
GND
R16
10K
R17
100
R20
36K
5V_USB_ST
LINK
2
GND
3
4
Vcc
5
U10
74LVC1G07
NRST
R18
10K
Not Fitted
R22
10K
GND
GND
R24
100K
R28
4K7
GND
R26
4K7
Not Fitted
R30
GND
R29
100
R21
1K5
T_SWDIO
GND
T_SWCLK
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
T_SWO
3V3_STLINK
PB6
PB7
STLK_TX
STLK_RX
3V3_STLINK
PA13
PA14
SWO
SWCLK
SWDIO
TX_STlink
(VCP)
RX_STlink
(VCP)
T_SWO
PB3
STLK_SWCLK
STLK_SWDIO
STLK_RST
SWD
STM32F103
D2
BAT60JFILM
5V
SB37
Open
R14
2K7
R15
4K7
GND
3V3_STLINK
3V3_STLINK
SB38
Close
SB39
Close
SB40
Open
T_SWDIO
T_SWCLK
USART2
of
STM32F103
TX
RX
1
2
CN14
R19
100K
R25
100/2K7
R27
100/100
GND
3V3_STLINK
2
4
6
8
10
12
1
3
5
7
9
11
14
13
16
15
JP5
GND
GND
VDD
STLK_SWD
IO
T_SWCLK
T_VDD
SB36
Close
PWR_EXT
STLK_R
ST
1
3
4
5
6
2
U9
USBLC6-2SC6
GND
5V_USB_ST
LINK
1
2
3
4
5
6
Not Fitted
CN13
HEADER_1X6
SWDIO
SWCLK
SWO
NRST
VREF
GND
C42
100nF
C41
100nF
C43
100nF
C46
100nF
C44
20pF
C45
20pF
C47
100nF
C48
100nF
C49
100nF
C50
100nF
VBAT
1
PA7
17
PC13
2
PA12
33
PC14
3
PB0
18
PC15
4
JTMS/SWDIO
34
OSCIN
5
PB1
19
OSCOUT
6
VSS_2
35
NRST
7
PB2/BOOT1
20
VSSA
8
VDD_2
36
VDDA
9
PB10
21
PA0
10
JTC
K/SW
CLK
37
PA1
11
PB11
22
PA2
12
PA15/JTDI
38
PA3
13
VSS_
1
23
PA4
14
PB3/
JTDO
39
PA5
15
VDD_
1
24
PA6
16
PB4
/JN
T
RS
T
40
PB12
25
PB5
41
PB13
26
PB6
42
PB14
27
PB7
43
PB15
28
BOOT0
44
PA8
29
PB8
45
PA9
30
PB9
46
PA10
31
VSS_
3
47
PA11
32
VDD_
3
48
U8
STM32F103CBT6
PWR_ENn
T_VDD
3V3_STLINK
R32
100K
R31
10
JMP5
J
umper 2.54mm
JMP6
Jumper 2.54mm
JMP7
J
umper 2.54mm
JMP8
J
umper 2.54mm
JMP9
J
umper 2.54mm
JMP10
Jumper 2.54
mm
JMP11
Jumper 2.54
mm
JP5(3-4 to 15-16)
Q1
2N2222
USB
STLK_
P
GND
T_VDD
NRST
X3
X3225-8MHz
17
19
Table of Contents
Default Chapter
2
Table of Contents
2
Features
6
Figure 1. Nucleo-68 and USB Dongle Boards (Top View on the Left, Bottom View on the Right)
7
Product Marking
8
System Requirements
8
Development Toolchains
8
Demonstration Software
8
Ordering Information
9
Table 1. Ordering Information
9
Table 2. Example of Codification
9
Hardware Layout and Configuration
10
Nucleo-68 Board
10
Figure 2. Nucleo-68 Hardware Block Diagram
10
Figure 3. Nucleo-68 Board (Top View)
11
Figure 4. Nucleo-68 Board (Bottom View)
12
Figure 5. Nucleo-68 Board Mechanical Drawing
13
Figure 6. Nucleo-68 Board Schematics
14
Figure 7. Nucleo-68 Board Schematics - RF Part
15
Figure 8. Nucleo-68 Board Schematics - Connectors
16
Figure 9. Nucleo-68 Board Schematics - Power Management
17
Figure 10. Nucleo-68 Board Schematics - ST-Link/V2-1
18
USB Dongle
19
Figure 11. USB Dongle Hardware Block Diagram
19
Figure 12. USB Dongle Board (Top View)
20
Figure 13. USB Dongle Board (Bottom View)
20
Figure 14. USB Dongle Mechanical Drawing
21
Figure 15. USB Dongle Schematics
22
Getting Started
23
Conventions
23
Quick Start
23
Default Boards Configuration
23
Table 3. Jumper and SB ON/OFF Conventions
23
Table 4. Default Jumper Configuration
24
Embedded ST-LINK/V2-1
25
Drivers
25
Figure 16. USB Composite Device
25
ST-LINK/V2-1 Firmware Upgrade
26
Figure 17. ST-LINK Debugger: JP1 Configuration for On-Board MCU
26
Power Supply and Selection
27
External Power Supply Input
27
Table 5. Power Sources
27
Figure 18. JP1[7-8]: 5V_STL Power Source
28
Figure 19. JP1[3-4]: 5V_VIN Power Source
29
Figure 20. JP1[5-6]: 5V_USB_MCU Power Source
30
External Power Supply Output
31
Internal Power Supply
31
Programing/Debugging When the Power Supply Is Not from USB ST-LINK (5V_St_Link)
31
Table 6. SB25 Bypass USB PWR Protection
31
OSC Clock Sources
32
LSE: OSC 32 Khz Clock Supply
32
OSC Clock Supply
32
Reset Sources
33
Virtual COM Port: LPUART/USART
33
Table 7. LPUART1 and USART1 Connections
33
Leds
34
Push Buttons
34
Current Measurement
34
Jumper Configuration
35
Table 8. Configuration of Jumpers and Solder Bridges
35
Connectors
36
USB ST-LINK Micro-B Connector CN15
36
Table 9. USB STLINK Micro-B Pinout (Connector CN15)
36
Figure 21. USB STLINK Micro-B Connector CN15 (Front View)
36
Arduino™ uno Revision 3 Connectors
37
Figure 22. Arduino™ Connector
37
Table 10. Arduino™ Connectors Pinout
38
Figure 23. Arduino™ Connector Pinout
38
ST Morpho Connectors CN7 and CN10
40
Figure 24. ST-Morpho Connector Pinout
40
Extension Connectors CN1 and CN2 on USB Dongle
41
Figure 25. Extension Connectors Pinout
41
Appendix A Nucleo-68 and USB Dongle MCU IO Assignment
42
Table 11. IO Assignment
42
Federal Communications Commission (FCC) and Industry Canada (IC) Compliance Statements
45
FCC Compliance Statement
45
IC Compliance Statement
45
Revision History
47
Table 12. Document Revision History
47
4
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ST P-NUCLEO-WB55 Specifications
General
Brand
ST
Model
P-NUCLEO-WB55
Category
Microcontrollers
Language
English
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