SM CODE CPU_SM_7
Fault detection time Refer to functional documentation
Addressed fault model
Systematic (software errors)
Permanent/transient (only program counter and memory access failures)
Dependency on Device configuration None
Initialization MPU registers must be programmed at start-up.
Periodicity On line
Test for the diagnostic MPU_SM_1: MPU software test
Multiple-fault protection MPU_SM_0: Periodic read-back of MPU configuration registers
Recommendations and known limitations
The use of memory partitioning and protection by MPU functions is highly recommended
when multiple safety functions are implemented in Application software. The MPU can be
indeed used to
• enforce privilege rules
• separate processes
• enforce access rules
Hardware random-failure detection capability for MPU is restricted to well-selected failure
modes, mainly affecting program counter and memory access CPU functions. The associated
diagnostic coverage is therefore not expected to be relevant for the safety concept of Device.
Table 11. CPU_SM_8
SM CODE CPU_SM_8
Description AMBA firewall
Ownership ST
Detailed implementation
The Firewall can protect a specific part of code or data in the non-volatile memory, and/or it
can protect volatile data in the SRAM 1 from interferences by the code executed outside the
protected area.
Illegal AMBA bus accesses are blocked through bus snooping.
DMA accesses to restricted area are blocked.
Error reporting Reset generation
Fault detection time Refer to functional documentation
Addressed fault model Systematic
Dependency on Device configuration None
Initialization Firewall protection must be enabled/disabled at run time.
Periodicity On demand (Firewall open/close)
Test for the diagnostic Not required
Multiple-fault protection Not required
Recommendations and known limitations
This diagnostic feature has been designed mainly to implement information security schemes
on STM32L4 and STM32L4+ Series MCUs. Anyway, it also contributes to the systematic
capability increase for Application software, being able to detect illegal accesses caused by
software design faults. In the framework of STM32L4 and STM32L4+ Series safety concept, it
could help to mitigate potential common cause failures related to DMA malfunctions.
Table 12. MPU_SM_0
SM CODE MPU_SM_0
Description Periodic read-back of MPU configuration registers
Ownership End user
UM2305
Hardware and software diagnostics
UM2305 - Rev 10
page 15/110
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