Supermicro X9DA7 - Default Setting

Chapter 1: Overview
1-5
JPME1 ME Recovery Pins 2-3 (Normal)
X9DA7 Jumpers
Jumper
Description Default Setting
JBT1
Clear CMOS See Chapter 3
JI
2
C1/JI
2
C2 SMBus to PCI-E Slots Pins 2-3 (Disabled)
JPI1 IEEE1394a Enable Pins 1-2 (Enabled)
JPL1 GLAN1/GLAN2 Enable Pins 1-2 (Enabled)
JPME1 Management Engine (ME) Recovery
Mode Enable
Pins 1-2 (Normal)
JWD1 Watch Dog Timer Enable Pins 1-2 (Reset)
X9DA7 Connectors
Connectors Description
7.1 Audio 8 Channel (7.1) High-Denition Backplane Audio Connector
Battery Onboard CMOS Battery (See Chapter 3 for Used Battery Disposal)
CNF1/CNF2 IEEE 1394a 1/2 Connectors
COM1 Backplane COM Port1
CPU1 Slot1/Slot3 PCI-E 3.0 x16 Slots (Available when CPU1 is installed.)
CPU2 Slot2 PCI-E 3.0 x4 Slot (Available when CPU2 is installed.)
CPU2 Slot4 PCI-E 3.0 x4 in x8 Slot (The slots are available when CPU2 is installed.)
CPU2 Slot5 PCI-E 3.0 x16 Slot (Available when CPU2 is installed.)
CPU2 Slot6 PCI-E 3.0 x8 Slot (The slots are available when CPU2 is installed.)
FAN1~7, FANA CPU/System Fan Headers (Fan6/Fan7: CPU 1/2 Fans)
J18 Front_Panel Audio Header
J22 ATX 24-Pin Power Connector (See Warning on Pg. 1-6.)
JD1 Speaker/Power LED Indicator
JF1 Front Panel Control Header
JL1 Chassis Intrusion
JOH1 Overheat/Fan Fail LED Indicator
JPI
2
C1 Power Supply SMBbus I
2
C Header
JPWR1/JPWR2 12V 8-Pin Power Connectors (See Warning on Pg. 1-6.)
JSD1 SATA DOM (Device_On_Module) Power Connector
JSPDIF_In SPDIF_(Sony/Philips Digital Interface)_In Header
JSPDIF_Out SPDIF_(Sony/Philips Digital Interface)_Out Header
JTPM1 TPM (Trusted Platform Module)/Port 80 Header
KB/Mouse (PS2) Keyboard/Mouse Connector
LAN1/2 Gigabit Ethernet LAN Ports 1/2