2-14
C7H61 User’s Manual
JPW2
JPW1
JWOL1
1
3
10
9
1
DIMM1
DIMM3
JF1
1
2
15
Tested to Comply
With FCC Standards
FOR HOME OR OFFICE USE
DESIGNED IN USA
2
J14
1
7
10
J13
1
2
JUSB30
19
11 10
MH10
1
JD1
+
SP1
JSD1
1
JTPM1
2
1
20
19
I-SATA0
1
I-SATA1
I-SATA2
I-SATA3
A-SATA0
A-SATA1
JITP1
60
2
59
1
B1
+
128
1
2
J34
COM2
1
5
6
9
COM5
1
5
COM6
1
5
6
9
COM7
1
5
6
9
COM8
1
5
6
9
1
5
6
COM3
9
1
5
6
COM4
9
BIOS LICENSE
1
JWOR1
JP2
JP1
JSPDIF_OUT
JSPDIF_IN
JI2C3JL1 JI2C4 JBT1
JP3
1
JPME2
JI2C1
1
1
JI2C2
JUSBLAN1
JUSBLAN2
A
LED1
C
LED2
C
A
R474
JPUSB1
1
JWD1
1
JPAC1
JLED1
1
1
JCPUVRD_SMB
FAN4
FAN1
1
FAN3
4
4 1
FAN2
MH6
MH7
JAUDIO1
103
128
64
39
38
2-3:Disable(Default)
1-2:Enable
JPUSB1:USB WAKE UP
2-3:Disable
1-2:RST(Default)
JWD1:Watch Dog
OFF:NORMAL
ON:ME MANUFACTURING MODE
JPME2
VCC
GND
SW
RST
SW
PWR
GND
PWR
LED-
LED-
HDD
LED+
HDD
LED+
PWR
PRINTER
SLOT6 PCI-E 2.0/3.0 X16
SLOT5 PCI 33MHz
SLOT4 PCI 33MHz
SLOT3 PCI 33MHz
OFF:DISABLE
ON:ENABLE
JI2C3/JI2C4:I2C BUS FOR PCI SLOT
AUDIO AC97 AND HD AUDIO JUMPER
USB10/11
USB8/9
USB3.0-0/1
JLED1:
JL1:
3PIN POWER LED
CHASSIS
AUDIO FP
SLOT1 PCI 33MHz
BUZZER
SLOT2 PCI 33MHz
JBT1
JTPM1:TPM/PORT80
CMOS CLEAR
ON:CLEAR
OFF:NORMAL
JWOR:WAKE ON RING
JD1:
SPEAKER:1-4
BUZZER:3-4
JPAC1:ONBOARD AUDIO ENABLE/DISABLE
1-2:ENABLE
2-3:DISABLE
ON:AC'97
JHD_AC1:
OFF:HD AUDIO
SATA DOM PWR
SLOT7 PCI-E 2.0 X1
UNB NON-ECC DDR3 DIMM REQUIRED
HD AUDIO
JWOL:WAKE ON LAN
DIMMA1 DIMMB1
JI2C1/JI2C2:I2C BUS FOR PCI-E SLOT
OFF:DISABLE
ON:ENABLE
RST
ON
PWR
LAN2/
USB4/5
LED
OH/FF
X
LED
HDD
NIC1
NIC2
LED
PWR
USB2/3
LAN1/
HDMI/DP
VGA/COM1
/CPU FAN
INTRUSION
KB/MOUSE & USB0/1
A. Backpanel USB 2.0 #1
B. Backpanel USB 2.0 #0
C. Backpanel USB 2.0 #3
D. Backpanel USB 2.0 #2
E. Backpanel USB 2.0 #5
F. Backpanel USB 2.0 #4
G. Front Panel USB 2.0 #8/9
H. Front Panel USB 3.0 #0/1*
I. Front Panel USB 2.0 #10/11
Universal Serial Bus (USB)
Six Universal Serial Bus 2.0 ports (0~5) are located on the I/O back panel. USB
2.0 headers 8/9,10/11 and USB 3.0 header 0/1* are used to provide front chassis
access using USB cables (not included). See the tables below for pin denitions.
Back Panel USB (2.0) 0,1,2,3,4,5
Pin Denitions
Pin# Denition Pin# Denition
1 +5V 5 +5V
2 USB_PN1 6 USB_PN0
3 USB_PP1 7 USB_PP0
4 Ground 8 Ground
Front Panel USB (2.0) #8/9, 10/11
Pin Denitions
Pin # Denition Pin # Denition
1 +5V 2 +5V
3 USB_PN2 4 USB_PN3
5 USB_PP2 6 USB_PP3
7 Ground 8 Ground
9 Key 10 Ground
A
Front Panel USB (3.0) #0/1
Pin Denitions
Pin# Pin# Signal Name Description
1 10 VBUS Power
2 11 D- USB 2.0 Differential Pair
3 12 D+
4 13 Ground Ground of PWR Return
5 14 StdA_SSRX- SuperSpeed Receiver
6 15 StdA_SSRX+ Differential Pair
7 16 GND_DRAIN Ground for Signal Return
8 17 StdA_SSTX- SuperSpeed Transmitter
9 18 StdA_SSTX+ Differential Pair
C
E
B