6-66
2. Check Shift Register U221 at pin 8 for activity (AD SR CLOCK line). If clock is missing, trouble-
shoot Control Register Clock Decoder A1OU271(diagram 5).
1. Check U511 pin 9 and U221 pin 9 for +5 V (registers not held reset). If not +5 V, then repair.
Run test 2520 in CONTINUOUS mode. Using the CH 2 probe:
NOTE
For the following, set the Trigger Position of the test 2430 to 3/4. If using an analog scope
for testing, use the appropriate holdoff and trigger level to view the signals of interest.
Set up the 2430 test scope as in Step 1 of the 2110 troubleshooting procedure.
Troubleshooting Procedure:
For this test, the MSB of A10U511 (pin 13) will be compared with what the MSB should be with each
shift of the register. If one of the bits differs from the loaded-in pattern, the test fails.
Testing Method:
Attenuator Shift Registers A10U221/A10U511 (schematic diagram 9):2520
ADEN
4. If U380A pin 1 is LO, then find which cathode of the input diodes (CR185, CR186, CR286, or
CR287) is LO. Run the test number for the suspected Shift Register and check the inputs (clocks,
data, and power) to it (look at the information given with the test number for the troubleshooting
procedure for each Shift Register). If they are all ok, replace the suspected Shift Register; if not,
troubleshoot the bad input.
3. If U380 pin 2 is LO, then run test 2560 and troubleshoot using the procedure given for that
number.
2. Check U380 pins 1 and 2. If both are HI during the trigger strobe HI and pin 3 does not follow,
then replace U380. If neither pin 1 nor 2 is HI, then suspect DAC Select Multiplexer U272 or its
input gating.
1. Check A1OU380 pin 3 (schematic diagram 5) for a HI level during the HI period of the trigger
strobe. If ok, then check for the same signal at A11U531 pin 18 (schematic diagram 17). If correct
and test is failing, replace U531 and run SELF DIAG.
Using the CH 2 probe:
Run test 2510 in CONTINUOUS mode.
Set up the 2430 test scope as in Step 1 of the 2110 troubleshooting procedure.
Troubleshooting Procedure:
For this test to pass, the MSB of the five output registers above must be high. If one of the registers
didn't have the correct pattern strobed in, the test fails.
Testing Method:
Acquisition Control Shift Registers A1OU270 (Gate Array), A1OU530 (Peak Detector), A1OU140 (Trig
Control), DAC Input Shift Register A10U850/U851 (schematic diagram 5), and Attenuator Shift Regis-
ter A10U221/U511 (schematic diagram 9):
2510lNIT
SHIFT REGS
Table 6-6 (cont)
Maintenance-2430 Service
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