Tektronix 2430 - Page 248

6-68
3. Check the data input to U850 at pins 1 and 2. The signal should be a train of pulses during the HI
period of the trigger strobe. If the data input signal is not present, test signals around U280D and
correct.
c. Replace U280 if not gating correctly; troubleshoot clock signals if not present.
b. Check U280B pin 6 for clocking signals during the HI period of the trigger strobe.
a. Check U280B pin 5 to have a lO gate present; replace U272 if pin 5 is stuck either HI or lO.
2. Check U850 pin 8 and U851 pin 8 for clock activity. If clocks are inactive, then:
1. Check U850 pin 9 and U851 pin 9 for HI level. If not +5 V, check R850 and source of the +5 V.
Run test 2560 in the CONTINUOUS mode. Using the CH 2 probe:
NOTE
For the following, set the Trigger Position of the test 2430 to 3/4. If using an analog scope
for testing, use the appropriate holdoff and trigger level to view the signals of interest.
Set up the 2430 test scope as in Step 1 of the 2110 troubleshooting procedure.
Troubleshooting Procedure:
For this test, the MSB of A10U851 (pin 13) will be compared with what the MSB should be with each
shift of the register. If one of the bits differs from the loaded-in pattern, the test fails.
Testing Method:
DAC Input Shift Registers A10U850/A10U851 (schematic diagram 5):
2560
SYSTEM DAC
4. If all inputs are good, replace U140.
3. Check U140 pins 1 and 2 for activity (ACD line is the data input); repair if inactive.
2. Check U140 pin 8 for activity (TRIG CONT ClK line). If inactive, repair.
Run test 2550 in CONTINUOUS mode. Using the CH 2 probe:
1. Check U140 pin 9 for a HI level (RESET). If lO, repair.
NOTE
For the following, set the Trigger Position of the test 2430 to 3/4. If using an analog scope
for testing, use the appropriate holdoff and trigger level to view the signals of interest.
Set up the 2430 test scope as in Step 1 of the 2110 troubleshooting procedure.
Troubleshooting Procedure:
For this test, the MSB of A10U140 (pin 13) will be compared with what the MSB should be with each
shift of the register. If one of the bits differs from the loaded-in pattern, the test fails.
Testing Method:
Acquisition Control Register A10U140 (schematic diagram 5):2550
TRIG
Table 6-6 (cont)
Maintenance-2430 Service