gpmc_clk
gpmc_csn[x]
gpmc_a[10:1]
gpmc_be0n_cle
gpmc_be1n
gpmc_advn_ale
gpmc_wen
gpmc_ad[15:0]
gpmc_wait[x]
D 0 D 1 D 2 D 3
F4
F15 F15 F15
F1
F1
F2
F6
F8F8
F0
F14F14
F3
F17
F17
F17
F9F6
F17
F17
F17
Valid Address
AM3359, AM3358, AM3357, AM3356, AM3354, AM3352
www.ti.com
SPRS717H –OCTOBER 2011–REVISED MAY 2015
A. In gpmc_csn[x], x is equal to 0, 1, 2, 3, 4, or 5.
B. In gpmc_wait[x], x is equal to 0 or 1.
Figure 7-19. GPMC and NOR Flash —Synchronous Burst Write —(GpmcFCLKDivider > 0)
Copyright © 2011–2015, Texas Instruments Incorporated Peripheral Information and Timings 133
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Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352
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