AM3359, AM3358, AM3357, AM3356, AM3354, AM3352
SPRS717H –OCTOBER 2011–REVISED MAY 2015
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5.3 Power-On Hours (POH)
Table 5-1. Reliability Data
(1)(2)(3)(4)
COMMERCIAL INDUSTRIAL EXTENDED INDUSTRIAL EXTENDED
OPERATING
JUNCTION LIFETIME JUNCTION LIFETIME JUNCTION LIFETIME JUNCTION LIFETIME
CONDITION
TEMP (T
J
) (POH)
(5)
TEMP (T
J
) (POH)
(5)
TEMP (T
J
) (POH)
(5)
TEMP (T
J
) (POH)
(5)
Nitro 0°C to 90°C 100K –40°C to 90°C 100K –40°C to 105°C 37K –40°C to 125°C -
Turbo 0°C to 90°C 100K –40°C to 90°C 100K –40°C to 105°C 80K –40°C to 125 ° C -
OPP120 0°C to 90°C 100K –40°C to 90°C 100K –40°C to 105°C 100K –40°C to 125°C -
OPP100 0°C to 90°C 100K –40°C to 90°C 100K –40°C to 105°C 100K –40°C to 125°C 35K
OPP50 0°C to 90°C 100K –40°C to 90°C 100K –40°C to 105°C 100K –40°C to 125°C 95K
(1) The power-on hours (POH) information in this table is provided solely for your convenience and does not extend or modify the warranty
provided under TI's standard terms and conditions for TI semiconductor products.
(2) To avoid significant degradation, the device power-on hours (POH) must be limited as described in this table.
(3) Logic functions and parameter values are not assured out of the range specified in the recommended operating conditions.
(4) The above notations cannot be deemed a warranty or deemed to extend or modify the warranty under TI's standard terms and
conditions for TI semiconductor products.
(5) POH = Power-on hours when the device is fully functional.
5.4 Operating Performance Points (OPPs)
Device OPPs are defined in Table 5-2 through Table 5-9.
Table 5-2. VDD_CORE OPPs for ZCZ Package
With Device Revision Code "Blank"
(1)
VDD_CORE VDD_CORE
OPP DDR3,
DDR2
(2)
mDDR
(2)
L3 and L4
Device Rev. DDR3L
(2)
MIN NOM MAX
"Blank"
OPP100 1.056 V 1.100 V 1.144 V 400 MHz 266 MHz 200 MHz 200 and 100
MHz
OPP50 0.912 V 0.950 V 0.988 V — 125 MHz 90 MHz 100 and 50
MHz
(1) Frequencies in this table indicate maximum performance for a given OPP condition.
(2) This parameter represents the maximum memory clock frequency. Since data is transferred on both edges of the clock, double-data rate
(DDR), the maximum data rate is two times the maximum memory clock frequency defined in this table.
Table 5-3. VDD_MPU OPPs for ZCZ Package
with Device Revision Code "Blank"
(1)
VDD_MPU
VDD_MPU OPP
ARM (A8)
Device Rev. "Blank"
MIN NOM MAX
Turbo 1.210 V 1.260 V 1.326 V 720 MHz
OPP120 1.152 V 1.200 V 1.248 V 600 MHz
OPP100
(2)
1.056 V 1.100 V 1.144 V 500 MHz
OPP100
(3)
1.056 V 1.100 V 1.144 V 275 MHz
(1) Frequencies in this table indicate maximum performance for a given OPP condition.
(2) Applies to all orderable AM335__ZCZ_50 (500-MHz speed grade) or higher devices.
(3) Applies to all orderable AM335__ZCZ_27 (275-MHz speed grade) devices.
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