AM3359, AM3358, AM3357, AM3356, AM3354, AM3352
SPRS717H –OCTOBER 2011–REVISED MAY 2015
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5 Specifications
5.1 Absolute Maximum Ratings
(1)(2)
over junction temperature range (unless otherwise noted)
MIN MAX UNIT
VDD_MPU
(3)
Supply voltage for the MPU core domain –0.5 1.5 V
VDD_CORE Supply voltage for the core domain –0.5 1.5 V
CAP_VDD_RTC
(4)
Supply voltage for the RTC core domain –0.5 1.5 V
VPP
(5)
Supply voltage for the FUSE ROM domain –0.5 2.2 V
VDDS_RTC Supply voltage for the RTC domain –0.5 2.1 V
VDDS_OSC Supply voltage for the System oscillator –0.5 2.1 V
VDDS_SRAM_CORE_BG Supply voltage for the Core SRAM LDOs –0.5 2.1 V
VDDS_SRAM_MPU_BB Supply voltage for the MPU SRAM LDOs –0.5 2.1 V
VDDS_PLL_DDR Supply voltage for the DPLL DDR –0.5 2.1 V
VDDS_PLL_CORE_LCD Supply voltage for the DPLL Core and LCD –0.5 2.1 V
VDDS_PLL_MPU Supply voltage for the DPLL MPU –0.5 2.1 V
VDDS_DDR Supply voltage for the DDR IO domain –0.5 2.1 V
VDDS Supply voltage for all dual-voltage IO domains –0.5 2.1 V
VDDA1P8V_USB0 Supply voltage for USBPHY –0.5 2.1 V
VDDA1P8V_USB1
(6)
Supply voltage for USBPHY –0.5 2.1 V
VDDA_ADC Supply voltage for ADC –0.5 2.1 V
VDDSHV1 Supply voltage for the dual-voltage IO domain –0.5 3.8 V
VDDSHV2
(6)
Supply voltage for the dual-voltage IO domain –0.5 3.8 V
VDDSHV3
(6)
Supply voltage for the dual-voltage IO domain –0.5 3.8 V
VDDSHV4 Supply voltage for the dual-voltage IO domain –0.5 3.8 V
VDDSHV5 Supply voltage for the dual-voltage IO domain –0.5 3.8 V
VDDSHV6 Supply voltage for the dual-voltage IO domain –0.5 3.8 V
VDDA3P3V_USB0 Supply voltage for USBPHY –0.5 4 V
VDDA3P3V_USB1
(6)
Supply voltage for USBPHY –0.5 4 V
USB0_VBUS
(7)
Supply voltage for USB VBUS comparator input –0.5 5.25 V
USB1_VBUS
(6)(7)
Supply voltage for USB VBUS comparator input –0.5 5.25 V
DDR_VREF Supply voltage for the DDR SSTL and HSTL reference voltage –0.3 1.1 V
Steady state max voltage
–0.5 V to IO supply voltage + 0.3 V
at all IO pins
(8)
USB0_ID
(9)
Steady state maximum voltage for the USB ID input –0.5 2.1 V
USB1_ID
(6)(9)
Steady state maximum voltage for the USB ID input –0.5 2.1 V
Transient overshoot and 25% of corresponding IO supply
undershoot specification at voltage for up to 30% of signal
IO terminal period
Latch-up performance
(10)
Class II (105°C) 45 mA
Storage temperature,
–55 155 °C
T
stg
(11)
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to their associated VSS or VSSA_x.
(3) Not available on the ZCE package. VDD_MPU is merged with VDD_CORE on the ZCE package.
(4) This supply is sourced from an internal LDO when RTC_KALDO_ENn is low. If RTC_KALDO_ENn is high, this supply must be sourced
from an external power supply.
(5) During functional operation, this pin is a no connect.
(6) Not available on the ZCE package.
(7) This terminal is connected to a fail-safe IO and does not have a dependence on any IO supply voltage.
(8) This parameter applies to all IO terminals which are not fail-safe and the requirement applies to all values of IO supply voltage. For
example, if the voltage applied to a specific IO supply is 0 volts the valid input voltage range for any IO powered by that supply will be
–0.5 to +0.3 V. Apply special attention anytime peripheral devices are not powered from the same power sources used to power the
respective IO supply. It is important the attached peripheral never sources a voltage outside the valid input voltage range, including
80 Specifications Copyright © 2011–2015, Texas Instruments Incorporated
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