CIRCUIT
SWEEP
ROTARY CIRCUIT
This circuit is a part of the sweep circuit, but is located on a
separate board. It is composed of a rotary switch to select the
sweep time and resistors of the HOLDOFF circuit.
HORIZONTAL
SWEEP CIRCUIT
This sweep circuit uses a constant current integrated circuit to
obtain sawtooth waveform by charging capacitor with constant
current.
Q14,
Q16, Q18 form the circuit that switches the sweep time
capacitors for A sweep.
For the B sweep, this function is managed by Q43, Q45, Q47 in
the same manner.
Q13,
Q15 and Q17 form the circuit that switches HOLDOFF
capacitor for the A sweep, and in the case of B sweep the same
operation is carried out by transistors Q42, Q44 and Q46. The
voltage supplied by the constant voltage circuit is converted to
a constant current source by the voltage setting circuit
comprised of IC3a and transistor Q8 and the resistor which is
selected by the rotary switch.
This current is used to charge the sweep time capacitor, and
result in a rise voltage at the capacitor terminals. This voltage
is sent to a high impedance buffer amplifier composed of Q19
and Q20.
When the output of this amplifier reaches a constant voltage
value,
IC7d is switched on and IC2b flip-flop is reset. At the
same time IC2a is set.
The output of IC2a turns on Q7 and enshorts the sweep time
capacitor. The terminal output voltage of the capacitor falls.
At the same time the constant current circuit which is
composed of Q22 changes one of the following HOLDOFF
capacitors; C13, C19, or C23.
The terminal voltage of the capacitor increases step by step.
When this terminal voltage goes beyond the threshold level
Q23 is turned on. The output of Q23 turns on the SCHMIDT
trigger circuit which is composed of IC2b. The output of IC2b
cancels the set condition of IC2a and sweep is once again
started.
The trigger signal sychronizes IC2a through IC1 a,
IC1 b. It cancels the set of the flip-flop when it is in the set state
and starts the sweep which is synchronized to the trigger
signal.
The SCHMIDT trigger circuit is composed of IC
1
a and IC1b.
The trigger signal which is smoothed by IC1a and IC1b is
supplied to IC1c, Q3 and Q4. When there is a trigger signal,
IC
1
d gate is closed and IC2a operates as the master slave flip-
flop.
When there is no trigger signal IC2a opens the gate of IC
1
d and
operates R-S flip-flop. This is the auto free run circuit.
Q24 to Q26 form the delay sweep level detection circuit.
When the voltage level increases as set by DELAY TIME
MULTIPLIER, Q24 is turned on and triggers IC8a gate, IC8a
and IC1 Ob compose the logic differential circuit. It makes
con-
stant width pulse which activates IC5b and starts B sweep
circuit is approximately the same as A sweep circuit, but it does
not have 3 low speed ranges. IC4d gate is selected from
master slave flip-flop using B START AFTER DELAY switch.
and has trigger priority to R-S flip-flop.
The sweep can be started from the voltage level set by the
DELAY TIME MULTIPLIER. A sweep horizontal position ad-
justment is carried out by Q53, and B sweep by Q54. The
selection of HORIZONTAL DISPLAY is carried out by Q55 to
Q58.
A and B sweep waveform is synthesized by Q55 and
Q58 collectors and X-Y signal is also sythesized at this point by
Q59.
The signal through Q60 enhances CMRR and is sent to next
stage by Q62 and Q63. Q64 and Q65, and Q66 and Q67 are
selected times one and times ten (x1 and x1 0) by Q69 and Q68
respectively. The impedance is converted to 50 ohms and is
sent to the horizontal output amplifier by Q70 and Q71.
The trace SEP circuit is composed of Q78 to Q80 and two
different bias voltages are sent to the vertical output amplifier
by the A and B sweep signals. IC8d is the reset-pulse
generator circuit in the case of signal sweep operation and also
produces the blanking control signal when it is necessary to
produce horizontal display using IC13a, IC14a and IC14e.
This circuit combines the sweep and chop signal using IC1 1a,
IC11 b, IC1
1
c, IC11 d and IC1 2d. The impedance is converted
in Q72 to Q75.
This signal becomes the input signal of the blanking circuit.
The signal in the case of DUAL or QUAD setting of the vertical
axis mode produced in IC12a, IC12b, IC13b, IC14c, IC14d,
IC15a, IC15b, IC15c and IC15d and D48 to D50.
IC12a and IC1 2b comprise the chop oscillator. The vertical
mode logic and horizontal mode logic signal switch this os-
cillator on and off. In the case of oscillation stopping this os-
cillator produces an alternate signal output.
On receiving a signal from IC14e, the output of IC12a and
IC 12b is turned off in the case of vertical axis single trace
operation by IC1 5d.
However this output can be supplied in another case. The out-
put of Q77 is supplied to the vertical amplifier and the output is
separated into chop and alternate signals.
HORIZONTAL
MODE
CONTROL
CIRCUIT
The switch states are latched by IC4 and IC7 which effec-
tively makes these non-locking switches into locking types
functionally.
For horizontal display D1-D9 and IC
1
d — IC
1
f are used to
hold 3 bits of coded status information. Waveform shaping
is used in the IC1 circuit to prevent misoperation. Diodes
D10 —D12 and IC2c—IC2e and IC3d form a circuit that is
used to detect what switch of the horizontal group has been
depressed.
The detected switch data is entered into the register IC4
which then holds the switch status. IC5 is a tri-state buffer.
IC6 is used to restore the encoded switches status informa-
tion on a one to one basis for all functions. Switch status
held until a particular switch is pressed for a second time.
7-2
To Next Page
Loading...
