VIPA System 300S SPEED7 CPU 313SC/DPM - Page 36

Chapter 3 Hardware description Manual VIPA System 300S SPEED7
3-10 HB140E - CPU SC - RE_313-6CF03 - Rev. 07/45
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Module name 313-6CF03
Blocks
OBs see the instruction list
- Size 64kByte
Nesting dept
- per priority class 8
- additional levels within an error OB 4
FBs 2048
- Size 64kByte
FCs 2048
- Size 64kByte
Address areas (I/O)
Total address areas 1024Byte/1024Byte
I/O Process image 128Byte/128Byte
Digital channels 8064/8064
- centralized 1008/1008
- integrated channels 16DI/16DO
Analog channels 503/503
- centralized 248/248
- integrated channels no
Configuration
Number of racks max. 4
Modules per rack max. 8; max. 7 in rack 3
Time
Real-time clock yes (HW clock)
- Backed-up yes
- buffered period 6 Weeks
- Accuracy Deviation per day < 10s
Operating hours counter 1
- Number 0
- Value range 2
15
- Selectivity 1hour
- Retentive yes, must be manually restarted after every
restart
Testing and commissioning functions
Status/Modify Variables yes
- Variable E, A, M, DB, T, Z
- Number of variables 30
of those as status variable 30
of those as control variable 14
Force yes
- Variable I, O
- Number of Variables 10
Block status yes
Single step yes
Break points 3
Diagnostic buffer yes
- Number of entries (not configurable) 100
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