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Wavetek 3000 - Dividers; Multipliers; M31 A - kHz Steps; VCO Operation

Wavetek 3000
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THEORY
OF
OPERATION
3
.11
.2
DIVIDERS
The
frequencies
below
40 MHz
are
pro-
duced
by
a
series
of
TTL counters
.
A
"divideby
4"
produces
the
10
MHz
out
put
for
the
phase-
locked
loop
in
the
optionalhigh
stabilityreference
.
This
frequency
is
further
divided
as
shown
in
Figure
3-16
to
provide
the
1
MHz,
2
kHz
and
1
kHz
outputs
.
3
.11
.3
MULTIPLIERS
The 40 MHz CW
is
fed
to
a harmonic
gen-
erator
which
produces
the
"comb"output
.
From
the
40
MHz
comb,
120
MHz
is
selected
and
applied
to
another
harmonic
genera-
tor
.
A
sample
of
the 120
MHz
comb
output
is
also
fed
to
a
filter
which
provides
the
1440
MHz
output
.
3
.12
M31A
-
kHz
STEPS
The
input
to
this
module
is
the
BCD
data
from
the
front-panel
"kHz"
switches
(to
3-16
21WHz
Figure
3-16
.
/MHz
M30
-
Crystal
Reference
3
.12
.1
VCO
/
A042
40
Milt
COME
3
.12
.2
PHASELOCKED
LOOP
120
MWs
?p0
M
.fis~
COMA
/440
MVL
the
right
of
the
decimal
point)
.
The
output
frequency
is
(10
MHz
-
Sk
kHz),
where
Sk
is
the
number
indicated
by
the
kHz
switches
.
If
the
FREQUENCY
is
set
to
333
.333
MHz,
for
example,
the
M31A
output
is
9
.667
MHz
.
The block
diagram
of
the
M31
is
shown
in
Figure
3-17
.
The output
frequency
is
generatedby
a
Voltage
ControlledOscillator
which
is
tuneablefrom
9
.001
to
10
.000
MHz
.
Including
the
VCO
in
a
phase-locked
loop
permitsaccurate
programmability
.
The
VCO
tuning
voltage
comes
from
the
Phase/
Frequency
Detector
circuit
.
A
1
kHz
signal
from
the
Crystal Reference
is
applied
to
one
input
of
the
phase
detector
(IC9)
.
A
sample
of
the
VCO
input
is
divided
by
the
Programmable
Divider,
.
and
the
result
is
applied
to
the
other input
of
the
phase
detector
.
Any
difference
in

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