Wavetek 3000 - M32 A - MHz Steps; Programmable Divider Function; Phase Detector Operation; Unlocked Indicator Logic

THEORY
OF OPERATION
3 .13 M32A - MHz STEPS
The M32A provides, for the M34, a refer-
ence
frequency
which
corresponds to the
setting
on
the
"MHz"
switches
. (See
block diagram, Figure3-18 .) The
M32A
outputrange is 1448 to 1487 MHz, which
repeats itself with every 40 MHz change
of
the
frequency switches . Any
specific
M32A outputrelates to the "MHz" switch
setting (S .) by
the equation (Output =
(1448
+
R) MHz), where R is the Remain
der of dividing S

by 40 .

If the front-
panel is set, for m example, for 333 .000,
R wouldbe 13

(333 .000
+
40 = 8 with a
Remainder of 13) .

The output of the
M32A would then be 1448+
13 =
1461 MHz .
3 .13 .1 VCO
The output
of the M32A is produced
by
a
Voltage
Controlled Oscillator
.
This
VCO
is coarsely tuned by the repeating
analog output of the 2122 .

Pine tuning
is the result of including the VCO in a
phase-locked loop .

In addition to the
VCO,
the phase-locked
loop includes a
phase detectorand Programmable
Divider .
3 .13 .2
PROGRAMMABLE DIVIDER
A sample of the VCO output is mixed with
the 1440 MHz signalfrom the crystal
Reference
producing a
difference
fre-
quency of from 8 to 47 MHz, which is then
shaped into TTLpulsesand applied to the
Programmable
Divider .
The Divider counts the falling edges of
the 8-47 MHz input pulses, resetting
each time a count of 47 is reached .
The resetpulse is
applied to one input
of the phasedetector . By controlling
the starting count of the Programmable
Divider, the effective divisor canbe
controlled .
The startingcount of the Programmable
Divider is selected by a Read Only
Memory, which is programmed to provide
the correct "R" information for each
"S,
:h" setting . This "R" is then applied
3-18
to the
Programmable Divider as
the
starting count .
Thus, as the starting
count varies from 0 to 39,
the
effectivedivisorvaries from 47
to 8 .
When the VCO is running at the correct
frequency,
the Programmable Divider
resetpulserate will be
1 MHz .
3 .13 .3
PHASE DETECTOR
One input to the phase detector is the
reset pulse from the Programmable
Divider . The other input is a 1 MHz
fixed reference signal
from the Crystal
Reference . The phase detector output
is a voltage determined by the
difference in
phase at the phase
detector inputs, and is usedto
correct
any error in the VCO frequency or
phase .
If the VCO output
frequency is too
high, for example, the phase detector
output becomes more negative, thus
increasing the VCO varactor diode
tuning capacitance and lowering the VCO
frequency .
If
the
VCO frequency
is too
low, the reverse occurs . Thus, . the loop
will tend to maintain zero phase or
frequency error . A
voltage-controlled
attenuatorbetween the phase detector
circuitand the VCO keeps the open-loop
gain of
the phase-locked
loop relatively
constant over the programmed
frequency
range, allowing the loop noise to be
minimized .
3 .13 .4
UNLOCKEDINDICATOR
When the phase-locked loop
is unlocked,
the LED on top of the modulewill light
and the front-panel ACCURACY
lights will
flash
.
A window detector monitors the voltage
level which is being fed from the phase
detector to the
VCO .
If the iroltage
exceeds the normal operating range,
power is applied to the module light and
the flasher circuit

am

the

Modulation
Board .